W79E217A Datasheet, PDF (169/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
19. ANALOG-TO-DIGITAL CONVERTER
The ADC contains a digital-to-analog converter (DAC) that converts the contents of a successive
approximation register to a voltage (V_DAC), which is compared to the analog input voltage (Vin). The
output of the comparator is then fed back to the successive approximation control logic that controls
the successive approximation register. This is illustrated in the figure below.
Figure 19-1: Successive Approximation ADC
19.1 Operation of ADC
A conversion can be initiated by software only or by either hardware or software. The software only
start mode is selected when control bit ADCCON.5 (ADCEX) =0. A conversion is then started by
setting control bit ADCCON.3 (ADCS) to 1. The hardware or software start mode is selected when
ADCCON.5 =1, and a conversion may be started by setting ADCCON.3 = 1 as above or by applying a
rising edge to external pin STADC (P4.0). When a conversion is started by applying a rising edge, a
low level must be applied to STADC for at least one machine cycle followed by a high level for at least
one machine cycle.
User sets ADCS to start converting then ADCS remains high while ADC is converting signal and will
be automatically cleared by hardware when ADC conversion is completed. The end of the 10-bit
conversion is flagged by control bit ADCCON.4 (ADCI). The upper 8 bits of the result are held in
special function register ADCH, and the two remaining bits are held in ADCL.1 (ADC.1) and ADCL.0
(ADC.0). The user may ignore the two least significant bits in ADCL and use the ADC as an 8-bit
converter (8 upper bits in ADCH). In any event, the total actual conversion time is 50 ADC clock input
cycles.
Control bits from ADCCON.0 to ADCCON.2 are used to control an analog multiplexer which selects
one of eight analog channels. An ADC conversion in progress is unaffected by an external or software
ADC start. The result of a completed conversion remains unaffected provided ADCI = logic 1. The
result of a completed conversion (ADCI = logic 1) remains unaffected when entering the idle mode.
The device supports maximum 8 analog input ports. 8 analog input ports share the I/O pins from P1.0
to P1.7. These I/O pins are switched to analog input ports by setting the bits of ADC Input Pin Select
Register (DDIO) to logic 1.
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Publication Release Date: December 14, 2007
Revision A3.0