W79E217A Datasheet, PDF (111/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
PDTCO and PDTC1 have time access protection in writing access. In Power inverter application,
a dead time insertion avoids the upper and lower switches of the half bridge from being active at the
same time. Hence the dead time control is crucial to proper operation of a system. Some amount of
time must be provided between turning off of one PWM output in a complementary pair and turning on
the other transistor as the power output devices cannot switch instantaneously.
14.6 PWM Output Override
Figure 14-12: Override Flow Diagram
Each of the PWM output channels can be manually overridden by using the appropriate bits in the
POVD and POVM registers. This function allow user to drive the PWM I/O pins to specified logic
states independent of the duty cycle comparison units. The PWM override bits are useful when
controlling various types of Electrically Commutated Motor (ECM) like a BLDC motor. The POVD
register contains eight bits, POVD[7:0]. It determines which PWM I/O pins will be overridden. On reset,
POVD is 00H.
The POVM register contains eight bits, POVM[7:0]. It determines the state of the PWM I/O pins when
a particular output is overridden via the POVD bits. On reset, POVM is 00H. The POVM[7:0] bits are
active-high. When the POVM[7:0] bits are set, the corresponding POVD[7:0] bit will have effect on the
PWM output. When one of the POVM bits is set, the output on the corresponding PWM I/O pin will be
determined by the state of corresponding POVD bit. When a POVM bit is clear, the PWM pin will be
driven to its active state. The odd channel is always the complement of the even channel with dead
time inserted.. Figure 14-13 demonstrates the override function in complementary mode.
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Publication Release Date: December 14, 2007
Revision A3.0