W79E217A Datasheet, PDF (62/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
BIT NAME
FUNCTION
PWM Channel 0, 2 and 4 Output Mode.
7 PWMEOM 0 = Disable PWM channels 0, 2 and 4 to pwm output pins.
1 = Enable PWM channels 0, 2 and 4 to pwm output pins.
PWM Channel 1, 3 and 5 Output Mode.
6 PWMOOM 0 = Disable PWM channels 1, 3 and 5 to pwm output pins.
1 = Enable PWM channels 1, 3 and 5 to pwm output pins.
PWM Channel 6 Output Mode.
5 PWM6OM 0 = Disable PWM channel 6 to pwm output pin.
1 = Enable PWM channel 6 to pwm output pin.
PWM Channel 7 Output Mode.
4 PWM7OM 0 = Disable PWM channel 7 to pwm output pin.
1 = Enable PWM channel 7 to pwm output pin.
3-1 -
Reserved.
0 BKF
The External Brake Pin Flag.
0 = The PWM is not brake.
1 = The PWM is brake by external brake pin. It will be cleared by software.
Together with option bits (PWMEE and PWMOE), PWMEOM, PWMOOM, PWM6OM and PWM7OM
control the PWM pin structure, as follow;
PWMEE/PWMOE
(OPTION BITS)
PWMEOM/PWMOOM
/PWM6OM/PWM7OM
PIO.X
(X = 0-7)
PIN STRUCTURES
X
0
1 (Disable)
1
0 (Enable)
1
0 (Enable)
1
X
Tri-state
X
Quasi (I/O output)
0
Push Pull (PWM output)
1
Push Pull (I/O output)
Table 7-2: PWM pin structures (during internal rom execution)
PWMEE/PWMOE
(OPTION BITS)
PWMEOM/PWMOOM PIO.X
PIN
/PWM6OM/PWM7OM (X = 0-7) ^OUTPUT
PIN STRUCTURES
1 (Disable)
0 (Enable)
X
X
External
access
Push Pull
X
X
External
access
Push Pull (strong)
Table 7-3: PWM pin structures (during external rom execution)
Note: PWMEOM/PWMOOM/PWM6OM/PWM7OM are cleared to zero when CPU in reset state.
Thus, the port pins that multi-function with PWM will be tristated on default. User is required to set
the bits to 1 to enable GPIO/PWM outputs.
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Publication Release Date: December 14, 2007
Revision A3.0