W79E217A Datasheet, PDF (60/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
ADC CONVERTER RESULT LOW REGISTER
Bit:
7
6
5
4
3
2
1
0
ADCLK.1 ADCLK.0 -
-
-
-
ADC.1
ADC.0
Mnemonic: ADCL
Address: E3h
BIT NAME
7-6 ADCLK
1-0 ADC
FUNCTION
ADC Clock Frequency Select. The 10 bit ADC needs a clock to drive the
converting that the clock frequency may not over 4MHz. ADCLK[1:0] controls the
frequency of the clock to ADC block:
ADCLK.1
0
0
1
1
ADCLK.0 ADC Clock Frequency
0 Crystal clock / 4 (Default)
1 Crystal clock / 8
0 Crystal clock / 16
1 Reserved
2 LSB of 10-bit A/D conversion result. Both bits are read only.
LCD CONTROL REGISTER
Bit:
7
6
5
4
3
2
1
0
LCDEN Clear
Duty
Pump -
FS2
FS1
FS0
Mnemonic: LCDCN
Address: E4h
BIT NAME
7 LCDEN
6 Clear
5 Duty
4 Pump
3-
2-0 FS
FUNCTION
LCD enable bit. This bit is set and cleared by software. When the LCD is
disabled, all Segment and Common pins output LOW.
0 = LCD disabled.
1 = LCD enabled.
Refresh the LCD panel when is enabled and COM pin goes LOW.
0: Inactive.
1: Active.
Select duty cycle:
0 = Enable 1/4 duty for 32*4 dots.
1 = Enable 1/3 duty for 32*3 dots.
Select voltage pump type:
0 = Voltage Pump type A (default).
1 = Voltage Pump type B (low power).
Reserved.
Frequency selection bit. These bits allow selection of the LCD frequency.
It controls the ratio between the input clock (Fosc) and the LCD output clock
(FLCD). These bits are set and cleared by software. Refer to Table 20-1: Divider
selection table using FS bits.
FS2 FS1 FS0 Divider
000
/1
001
/2
010
/4
011
/8
1xx
/16
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Publication Release Date: December 14, 2007
Revision A3.0