W79E217A Datasheet, PDF (44/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
SLAVE ADDRESS MASK ENABLE
Bit:
7
6
5
4
3
2
1
0
SADEN.7 SADEN.6 SADEN.5 SADEN.4 SADEN.3 SADEN.2 SADEN.1 SADEN.0
Mnemonic: SADEN
Address: B9h
BIT NAME
FUNCTION
7-0 SADEN
This register enables the Automatic Address Recognition feature of the Serial
port. When a bit in the SADEN is set to 1, the same bit location in SADDR will be
compared with the incoming serial port data. When SADEN.n is 0, then the bit
becomes don't care in the comparison. This register enables the Automatic
Address Recognition feature of the Serial port. When all the bits of SADEN are
0, interrupt will occur for any incoming address.
SLAVE ADDRESS MASK ENABLE 1
Bit:
7
6
5
4
3
2
1
0
SADEN1.7 SADEN1.6 SADEN1.5 SADEN1.4 SADEN1.3 SADEN1.2 SADEN1.1 SADEN1.0
Mnemonic: SADEN1
Address: BAh
BIT NAME
FUNCTION
7-0 SADEN1
This register enables the Automatic Address Recognition feature of the Serial
port 1. When a bit in the SADEN1 is set to 1, the same bit location in SADDR1
will be compared with the incoming serial port data. When SADEN1.n is 0, then
the bit becomes don't care in the comparison. This register enables the
Automatic Address Recognition feature of the Serial port. When all the bits of
SADEN1 are 0, interrupt will occur for any incoming address.
PWM OUTPUT OVERRIDE CONTROL REGISTERS
Bit:
7
6
5
4
3
2
1
0
POVM.7 POVM.6 POVM.5 POVM.4 POVM.3 POVM.2 POVM.1 POVM.0
Mnemonic: POVM
Address: BBh
BIT NAME
FUNCTION
7-0 POVM
PWM Override Mode enable bits;
0: The PWM output follows the corresponding PWM generator.
1: The PWM output is equal to corresponding bit in POVD.
PWM OUTPUT STATE REGISTERS
Bit:
7
6
5
POVD.7 POVD.6 POVD.5
Mnemonic: POVD
4
POVD.4
3
POVD.3
2
POVD.2
1
0
POVD.1 POVD.0
Address: BCh
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Publication Release Date: December 14, 2007
Revision A3.0