English
Language : 

W79E217A Datasheet, PDF (170/207 Pages) Winbond – 8-bit Microcontroller
Preliminary W79E217A Data Sheet
Figure 19-2: ADC Block Diagram
19.2 ADC Resolution and Analog Supply
The ADC circuit has its own supply pins (AVDD and AVSS) and one pins (Vref+) connected to each end
of the DAC’s resistance-ladder that the AVDD and Vref+ are connected to VDD and AVSS is connected to
VSS. The ladder has 1023 equally spaced taps, separated by a resistance of “R”. The first tap is
located 0.5×R above AVSS, and the last tap is located 0.5×R below Vref+. This gives a total ladder
resistance of 1024×R. This structure ensures that the DAC is monotonic and results in a symmetrical
quantization error.
For input voltages between AVSS and [(Vref+) + ½ LSB], the 10-bit result of an A/D conversion will be
0000000000B = 000H. For input voltages between [(Vref+) – 3/2 LSB] and Vref+, the result of a
conversion will be 1111111111B = 3FFH. AVref+ and AVSS may be between AVDD + 0.2V and AVSS –
0.2 V. Avref+ should be positive with respect to AVSS, and the input voltage (Vin) should be between
AVref+ and AVSS.
The result can always be calculated from the following formula:
Vin
Result = 1024 ×
or Result = 1024 × VDD
AVref +
V SS
- 170 -
Publication Release Date: December 14, 2007
Revision A3.0