W79E217A Datasheet, PDF (63/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
EXTENDED INTERRUPT ENABLE
Bit:
7
6
5
4
3
2
ES1
EX5
EX4
EWDI
EX3
EX2
Mnemonic: EIE
BIT NAME
7 ES1
6 EX5
5 EX4
4 EWDI
3 EX3
2 EX2
1-
0 EI2C
FUNCTION
Enable Serial Port 1 interrupts.
Enable External Interrupt 5.
Enable External Interrupt 4.
Enable Watchdog timer interrupt.
Enable External Interrupt 3.
Enable External Interrupt 2.
Reserved.
Enable I2C interrupt.
1
0
-
EI2C
Address: E8h
I2C CONTROL REGISTER
Bit:
7
6
5
4
3
2
1
0
-
ENS
STA
STO
SI
AA
I2CIN
-
Mnemonic: I2CON
Address: E9h
BIT NAME
7-
6 ENS
5 STA
4 STO
3 SI
2 AA
1 I2CIN
0-
FUNCTION
Reserved.
I2C serial function block enable bit. When ENS=1 the I2C serial function
enables. The port latches of SDA and SCL must be set to logic high.
I2C START Flag. Setting STA to logic 1 to enter master mode, the I2C hardware
sends a START or repeat START condition to bus when the bus is free.
I2C STOP Flag. In master mode, setting STO to transmit a STOP condition to
bus then I2C hardware will check the bus condition if a STOP condition is
detected this flag will be cleared by hardware automatically. In a slave mode,
setting STO resets I2C hardware to the defined “not addressed” slave mode.
I2C Interrupt Flag. When a new SIO state is present in the S1STA register, the
SI flag is set by hardware, and if the EA and EI2C bits are both set, the I2C
interrupt is requested. SI must be cleared by software.
Assert Acknowledge Flag. When AA=1 an acknowledged (low level to SDA) will
be returned during the acknowledge clock pulse on the SCL line. When AA=0 an
acknowledged (high level to SDA) will be returned during the acknowledge clock
pulse on the SCL line.
By default it is zero and input are allows to come in through SDA pin. As when it
is 1 input is disallow and to prevent leakage current. During Power-Down mode
input is disallow.
Reserved.
- 63 -
Publication Release Date: December 14, 2007
Revision A3.0