W79E217A Datasheet, PDF (26/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
TIMER MODE CONTROL
Bit:
7
6
5
4
3
2
1
0
GATE
C/ T
M1
M0
GATE
C/ T
M1
M0
TIMER1
TIMER0
Mnemonic: TMOD
BIT NAME
FUNCTION
Address: 89h
Gating control: When this bit is set, Timer 1 is enabled only while the INT1 pin is high
7 GATE _{and the TR1 control bit is set. When cleared, the INT1 pin has no effect, and Timer 1}
is enabled whenever TR1 is set.
6
Timer or Counter Select: When clear, Timer 1 is incremented by the internal clock.
C/T _{When set, the timer counts falling edges on the T1 pin.}
5 M1 Timer 1 mode select bit 1. See table below.
4 M0 Timer 1 mode select bit 0. See table below.
Gating control: When this bit is set, Timer 0 is enabled only while the INT0 pin is high
3 GATE _{and the TR0 control bit is set. When cleared, the INT0 pin has no effect, and Timer 0}
is enabled whenever TR0 is set.
2
Timer or Counter Select: When clear, Timer 0 is incremented by the internal clock.
C/T _{When set, the timer counts falling edges on the T0 pin.}
1 M1 Timer 0 mode select bit 1. See table below.
0 M0 Timer 0 mode select bit 0. See table below.
M1, M0: Mode Select bits:
M1 M0 Mode
0 0 Mode 0: 8-bit timer/counter TLx serves as 5-bit pre-scale.
0 1 Mode 1: 16-bit timer/counter, no pre-scale.
1 0 Mode 2: 8-bit timer/counter with auto-reload from THx
1 1 Mode 3:
(Timer 0) TL0 is an 8-bit timer/counter controlled by the standard Timer-0 control
bits. TH0 is an 8-bit timer only controlled by Timer-1 control bits.
(Timer 1) Timer/Counter 1 is stopped.
TIMER 0 LSB
Bit:
7
6
5
4
3
2
1
0
TL0.7
TL0.6
TL0.5
TL0.4
TL0.3
TL0.2
TL0.1
TL0.0
Mnemonic: TL0
TL0.7-0
Timer 0 LSB
Address: 8Ah
TIMER 1 LSB
Bit:
7
6
5
4
3
2
1
0
TL1.7
TL1.6
TL1.5
TL1.4
TL1.3
TL1.2
TL1.1
TL1.0
Mnemonic: TL1
TL1.7-0
Timer 1 LSB
Address: 8Bh
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Publication Release Date: December 14, 2007
Revision A3.0