W79E217A Datasheet, PDF (56/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
WATCHDOG CONTROL 2
Bit:
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
STRLD
Mnemonic: WDCON2
Address: D7h
BIT NAME
FUNCTION
7-6 -
Reserved.
Set this bit, CPU will restart from LD Flash EPROM after watchdog reset. Clear
0 STRLD this bit, CPU will restart from AP Flash EPROM after watchdog reset. This
register is protected by timer access (TA) register.
WATCHDOG CONTROL
Bit:
7
6
5
4
3
2
1
0
-
POR
-
-
WDIF
WTRF
EWT
RWT
Mnemonic: WDCON
Address: D8h
BIT NAME
FUNCTION
7-
Reserved.
6 POR
Power-on Reset Flag. Hardware will set this flag on a power up condition. This
flag can be read or written by software. A write by software is the only way to
clear this bit once it is set.
5-4 -
Reserved.
3 WDIF
Watchdog Timer Interrupt Flag. This bit is set by hardware to indicate that the
time-out period has elapsed and invoke watch dog timer interrupt if enabled
(EWDI=1). This bit must be clear by software.
Watchdog Timer Reset Flag. Hardware will set this bit when the watchdog timer
2
WTRF
causes a reset if EWT= 1. Software can read it but must clear it manually. A
power-on reset will also clear the bit. This bit helps software in determining the
cause of a reset
1 EWT
Enable Watchdog timer Reset. Setting this bit will enable the Watchdog timer
Reset function after 512 clocks delay from time out and setting WTRF flag.
0 RWT
Reset Watchdog Timer. This bit restarts the watchdog timer and helps in putting
the watchdog timer into a know state. It also helps in resetting the watchdog timer
before a time-out occurs. If EWDI (EIE.4) is set, an interrupt will occur when time-
out. If EWT is set, 512 clocks after the time-out, a system reset will occur and
CPU starts from 0000H. This bit is self-clearing. The WDCON SFR is set to a
0x0x0xx0b on an external reset. WTRF is set to a 1 on a Watchdog timer reset,
but to a 0 on power on resets. WTRF is not altered by an external reset. POR is
set to 1 by a power-on reset. EWT is cleared to 0 on a Power-on reset and
unaffected by other resets.
The WDCON SFR is set to x0xx 0000b on an external reset. WTRF is set to a 1 on a Watchdog timer
reset, but to a 0 on power on resets. POR is set to 1 by a power-on reset. EWT is cleared to 0 on a
Power-on reset, reset pin reset, Watch Dog Timer reset and ISP reset.
- 56 -
Publication Release Date: December 14, 2007
Revision A3.0