W79E217A Datasheet, PDF (38/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
INPUT CAPTURE 2/MAXIMUM COUNTER LOW REGISTER
Bit:
7
6
5
4
3
2
1
0
CCL2.7/ CCL2.6/M CCL2.5/M CCL2.4/
MAXCNTL. AXCNTL. AXCNTL. MAXCNT
7
6
5
L.4
CCL2.3/
MAXCNT
L.3
CCL2.2/
MAXCNT
L.2
CCL2.1/M
AXCNTL.
1
CCL2.0/M
AXCNTL.
0
Mnemonic: CCL2/MAXCNTL
Address: A6h
INPUT CAPTURE 2/MAXIMUM COUNTER HIGH REGISTER
Bit:
7
6
5
4
3
2
1
0
CCH2.7/ CCH2.6/ CCH2.5/ CCH2.4/ CCH2.3/ CCH2.2/ CCH2.1/ CCH2.0/
MAXCNTH. MAXCNTH MAXCNTH MAXCNTH MAXCNTH MAXCNTH MAXCNTH. MAXCNTH.
7
.6
.5
.4
.3
.2
1
0
Mnemonic: CCH2/MAXCNTH
Address: A7h
INTERRUPT ENABLE
Bit:
7
6
5
4
3
2
1
0
EA
EADC
ET2
ES
ET1
EX1
ET0
EX0
Mnemonic: IE
Address: A8h
BIT NAME
FUNCTION
7 EA
Global enable: Enable/disable all interrupts.
6 EADC
Enable ADC interrupt.
5 ET2
Enable Timer 2 interrupt.
4 ES
Enable Serial Port 0 interrupts.
3 ET1
Enable Timer 1 interrupt.
2 EX1
Enable external interrupt 1.
1 ET0
Enable Timer 0 interrupt.
0 EX0
Enable external interrupt 0.
SLAVE ADDRESS
Bit:
7
6
5
4
3
2
1
0
SADDR.7 SADDR.6 SADDR.5 SADDR.4 SADDR.3 SADDR.2 SADDR.1 SADDR.0
Mnemonic: SADDR
Address: A9h
BIT NAME
FUNCTION
7-0 SADDR
The SADDR should be programmed to the given or broadcast address for serial
port to which the slave processor is designated.
SLAVE ADDRESS 1
Bit:
7
6
5
4
3
2
1
0
SADDR1.7 SADDR1.6 SADDR1.5 SADDR1.4 SADDR1.3 SADDR1.2 SADDR1.1 SADDR1.0
Mnemonic: SADDR1
Address: AAh
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Publication Release Date: December 14, 2007
Revision A3.0