W79E217A Datasheet, PDF (35/207 Pages) Winbond – 8-bit Microcontroller

Preliminary W79E217A Data Sheet
INSTR.
NVM Size =
SRAM (2K)
Addr ≤ 2K Addr > 2K
MOVX A,
@DPTR
(Read)
NVM¹
Ext
memory¹
EnNVM = 1
NVM Size (1K) : Note < SRAM (2K)
DME0 = 0
Addr
≤
1K/512B/256B
1K
<
Addr<
2K
Addr > 2K
Addr ≤
1K/512B/2
56B
DME0 = 1
1K < Addr
< 2K
NVM¹
Ext memory¹
Ext
memory¹
NVM¹
SRAM¹
Addr > 2K
Ext
memory¹
MOVX A,
@R0
NVM²
(Read)
Invalid
(see Note)
NVM²
Ext memory
Port2:GPIO³
Invalid
(see Note)
NVM²
SRAM²
Invalid
(see ote)
MOVX A,
@R1
NVM²
(Read)
Invalid
(see Note)
NVM²
Ext memory
Port2:GPIO³
Invalid
(see Note)
NVM²
SRAM²
Invalid
(see Note)
MOVX
@DPTR, A
(Write)
NOP
Ext
memory¹
NOP
Ext memory¹
Ext
memory¹
NOP
SRAM¹
Ext
memory¹
MOVX
@R0, A
(Write)
NOP
NOP
NOP
Ext memory
Port2:GPIO³
Invalid
(see Note)
NOP
SRAM²
Invalid
(see Note)
MOVX
@R1, A
(Write)
NOP
NOP
NOP
Ext memory
Port2:GPIO³
Invalid
(see Note)
NOP
SRAM²
Invalid
(see Note)
Tabel 7-1: Memory Access Destination
1. A15~A0=DPTR
2. A15~A8=XRAMAH
3. A15~A8=P2(GPIO), XRAMAH is invalid.
Note: User should take care when accessing the memory with this instruction. Access to invalid
regions may cause undesirable results.
PORT 4 CHIP-SELECT POLARITY
Bit:
7
6
5
4
3
P43INV P42INV P41INV P40INV -
Mnemonic: P4CSIN
2
PWDNH
1
0
RMWFP PUP0
Address: A2h
- 35 -
Publication Release Date: December 14, 2007
Revision A3.0