TA1360ANG Datasheet, PDF (90/108 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

TA1360ANG
Note
No.
Characteristics
SW3
T34 OSD blending A
characteristic
↓
C
SW4
B
SW5
B
Test Conditions
SW Mode
SW33 SW34 SW35
A
A
A
SW37
A
↓
B
SW38
A
↓
B
SW39
B 1.
↓ ^2.
B ^3.
4.
Test Method
Input signal 1(f₀ = 100 kHz, picture period amplitude = 0.2 Vp-p) from pin 3.
Measure pins 41, 42, and 43 picture period amplitude, v41a, v42a, and v43a.
Apply 5-V external voltage to pin 51.
Measure pins 41, 42, and 43 picture period amplitude, v41b, v42b, and v43b.
5. Calculate v41b amplitude in relation to v41a, v42b amplitude in relation to v42a, and v43b
amplitude in relation to v43a in decibel: α41TV1, α42TV1, and α43TV1.
6. Apply 5-V external voltage to pin 50, and repeat the steps 3 to 5 above: α41TV2, α42TV2,
and α43TV2.
7. Apply 5-V external voltage to pins 50 and 51, and repeat the steps 3 to 5 above: α41TV3,
α42TV3, and α43TV3.
8. Set SW3 to C. Set SW37, 38, and 39 to B.
9. Input signal 1 (f₀ = 100 kHz, picture period amplitude = 0.2 Vp-p) from pins 37, 38, and 39.
10. Apply 5-V external voltage to pins 50 and 51.
11. Measure pins 41, 42, and 43 picture period amplitude, v41c, v42c, and v43c.
12. Apply 5-V external voltage to pin 50.
13. Measure pins 41, 42, and 43 picture period amplitude, v41d, v42d, and v43d.
14. Calculate v41d amplitude in relation to v41c, v42d amplitude in relation to v42c, and v43d
amplitude in relation to v43c in decibel: α41OSD1, α42OSD1, and α43OSD1.
15. Apply 5-V external voltage to pin 51, and repeat the steps 12 to 14 above: α41OSD2,
α42OSD2, and α43OSD2.
16. Apply 5-V external voltage to pins 50 and 51, and repeat the steps 12 to 14 above:
α41OSD3, α42OSD3, and α43OSD3.
90
2003-01-21