TA1360ANG Datasheet, PDF (69/108 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

Note No.
Characteristics
S02 Dynamic Y/C compensation
TA1360ANG
SW3
C
SW8
B
Test Conditions
SW Mode
SW4 SW5
A
A
SW7
Test Method (Test condition: V_CC = 9 V/2 V, Ta = 25 ± 3°C)
B 1. Input 100-kHz sync signal to TP4, and set #4 amplitude to 0.2 Vp-p.
SW9
B
SW10
B
SW56 ^2.
OPEN
Set Y mute OFF (P-MODE: Normal 1, 000), brightness to center (1000000), color to center (1000000),
unicolor to maximum (1111111), and Y/C Gain Comp to minimum (00). Set black stretch point 1 to OFF (000),
dark area static Yγ gain to minimum (00), light area static Yγ gain to maximum (11), and SW1 to B. Apply 5.16
V to #3 from external power supply PS1.
3. Monitor #41 output waveform, and measure amplitude VBDY0.
4. Set Y/C Gain Comp to maximum (11). Set SW1 to B. Set black stretch point 1 to OFF (000), dark area static
Yγ gain to maximum (11), light area static Yγ gain to maximum (00), and monitor #41 amplitude VBDY1.
5. Set Y/C Gain Comp to maximum (11). Switch SW1 to A, and TPI to GND. Set black stretch point 1 to
maximum (111), dark area static Yγ gain to minimum (00), bright area static Yγ gain to maximum (11), and
monitor #41 amplitude VBDY2.
6. Calculate the following equations.
GC_BDY1 = 20 × log (VBDY1/VBDY0), GC_BDY2 = 20 × log (VBDY2/VBDY0)
7. Input 100-kHz sync signal to TP5, and repeat the procedure above. Calculate the following equations.
GC_RDY1 = 20 × log (VRDY1/VRDY0), GC_RDY2 = 20 × log (VRDY2/VBDY0)
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2003-01-21