TA1360ANG Datasheet, PDF (57/108 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

TA1360ANG
Note No.
Characteristics
P18 DC restoration rate correction
point
SW1
B
Test Conditions
SW Mode
SW2 SW3 SW7
B
C
B
SW56
Test Method (Test condition: V_CC = 9 V/2 V, Ta = 25 ± 3°C)
ON 1. Set DC restoration rate correction point to minimum (000), DC restoration rate correction limit point to 80%
(11), and connect external power supply PS1 to #3.
2. Monitor DC level of #43 picture period. Set PS1 to V₃ + 0.7 V, and adjust unicolor so that DC level is + 1.0.
3. Set DC restoration correction rate to minimum (000), and increase PS1 from V₃. Plot relation between #56
(DC voltage) and #43 (voltage in picture period).
4. Set DC restoration correction rate to maximum (111), and increase PS1 from V₃. Plot relation between #56
and #43.
5. Set DC restoration correction rate to maximum (111), DC restoration rate correction point (111), and increase
PS1 from V₃. Plot relation between #56 and #43.
6. Determine V_DT0, and V_DT1 using the following equations.
V_DT0 = [(V_SP0 − V₅₆)/1 V] × 100%
V_DT1 = [(V_SP1 − V₅₆)/1 V] × 100%
#43
DC restoration rate
correction point 000
DC restoration rate correction
point 111
V_SP0
V_PC
DC restoration correction
rate 000
V_SP1
#56
57
2003-01-21