TA1360ANG Datasheet, PDF (89/108 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

TA1360ANG
Note
No.
Characteristics
T33 OSD ACL
characteristic
SW3
A
SW4
B
SW5
B
Test Conditions
SW Mode
SW33 SW34 SW35
A
A
A
SW37
A
SW38
A
SW39
B 1.
Test Method
Input signal 1(f₀ = 100 kHz, picture period amplitude = 0.2 Vp-p) from pin 3. Control drive
gain adjustment data so that pins 41 and 42 picture period amplitude equals that of pin 43.
2. Set subaddress (07) data to (01).
3. Apply 5-V external voltage to pins 50 and 51.
4. Input signal 1 (f₀ = 100 kHz, picture period amplitude = 0.2 Vp-p) from pin 39.
5. Measure pin 43 picture period amplitude, vOSDACL1.
6. Apply “pin 53 DC voltage − 0.8 V” to pin 53 from external power supply, and measure pin
43-picture period amplitude, vOSDACL2.
7. Apply “pin 53 DC voltage − 1.3 V” to pin 53 from external power supply, and measure pin
43-picture period amplitude, vOSDACL3.
8. OSDACL₁ = −20 × log (vOSDACL2/vOSDACL1)
OSDACL₂ = −20 × log (vOSDACL3/vOSDACL1)
9. OSDACL3ɺOSDACL4 Change subaddress (07) data to (80), and repeat the steps 6 to 8
above to measure OSDACL3 and OSDACL4.
89
2003-01-21