TA1360ANG Datasheet, PDF (18/108 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

TA1360ANG
Appendix 3; Compression-BLK Phase
V-Frequency
000
001
010
011
100
101
110
111
Phase-1 (start phase) *
1088 H~1116 H
720 H~748 H
592 H~620 H
528 H~556 H
488 H~516 H
280 H~308 H
224 H~252 H
C-BLK OFF
Phase-2 (stop phase)
50~78 H
(0000: C-BLK2 OFF)
*: C-BLK1 = 1111: C-BLK1 OFF
Appendix 4; P-Mode
05-D7 1A-D1 1A-D0
MODE
Description
P-Mute and halftone the main signal by pin Y_M.
0
0
0
NORMAL 1 Insert analog RGB-IN by Ys3, and OSD-IN by Ys1/Ys2.
Analog RGB-IN > P-Mute
Full-screen-mute process is executed on Y of main signal by BUS.
0
0
1
Y-MUTE Insert analog RGB-IN by Ys3, and OSD-IN by Ys1/Ys2.
Analog RGB-IN > P-Mute
Full-screen-halftone process is executed on main signal by BUS.
0
1
0
Y_M 1
Insert P-Mute by pin Y_M, and analog RGB-IN by Ys3.
Ys1/Ys2 blends OSD-IN and main halftone signal.
Analog RGB-IN > P-Mute
Blue background process is executed on main signal by BUS.
0
1
1
BB
Insert P-Mute by pin Y_M, analog RGB-IN by Ys3, and OSD-IN by Ys1/Ys2
Analog RGB-IN > P-Mute
Full-screen-mute process is executed on main signal by BUS.
1
0
0
P-MUTE 1 Insert analog RGB-IN by Ys3, and OSD-IN by Ys1/Ys2.
Analog RGB-IN > P-Mute
Full-screen-halftone process is executed on main signal by BUS.
1
0
1
Y_M 2
Insert P-Mute by pin Y_M, and analog RGB-IN by Ys3.
Ys1/Ys2 blends OSD-IN and main halftone signal
P-Mute > Analog RGB-IN
Full-screen-mute process is executed on main signal and analog RGB-IN by
BUS.
1
1
0
P-MUTE 2 _{Insert OSD-IN by Ys1/Ys2.}
P-Mute > Analog RGB-IN
P-Mute and halftone process is executed on the main signal by pin Y_M.
1
1
1
NORMAL 2 Analog RGB-IN is inserted by Ys3, and OSD-IN by Ys1/Ys2.
P-Mute > Analog RGB-IN
Output priority; (000)~(100): Main signal < BB < P-MUTE < RGB-IN < OSD-IN
(101)~(111): Main signal < BB < RGB-IN < P-MUTE < OSD-IN
18
2003-01-21