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TA1360ANG Datasheet, PDF (58/108 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
TA1360ANG
Note No.
Characteristics
P19 DC restoration rate correction
limit point
SW1
B
Test Conditions
SW Mode
SW2 SW3 SW7
B
B
C
SW56
Test Method (Test condition: VCC = 9 V/2 V, Ta = 25 ± 3°C)
ON 1. Set unicolor to maximum (1111111), DC restoration rate correction point to minimum (000), and connect
external power supply PS1 to #56.
2. Set DC restoration correction rate to maximum (111).
3. Increase PS from 5 V. Monitor #43, and plot DC restoration correction amount.
4. Repeat the step 3 above by changing data at DC restoration rate correction limit point. Measure the value
using the figure below. Calculate PDTL60, PDTL75, PDTL87, and PDTL100 using following equations.
PDTL60 = [(VL60 − V56)/1.0] × 100%
PDTL75 = [(VL75 − V56)/1.0] × 100%
PDTL87 = [(VL87 − V56)/1.0] × 100%
PDTL100 = [(VL100 − V56)/1.0] × 100%
#43
100% (00)
87% (01)
73% (10)
60% (11)
VL60
VL75
58
VL100
#56
VL87
2003-01-21