TA1360ANG Datasheet, PDF (36/108 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

TA1360ANG
Characteristics
Analog OSD input white peak slice
levelç
Analog OSD black peak limit levelç
OSD contrast adjustment
characteristicç
Analog OSD bright adjustment
characteristicç
Analog OSD mode switching voltage
Analog OSD mode switching transfer
characteristicç
OSD ACL characteristicç
Symbol
Test
Circuit
Test Condition
Min Typ. Max Unit
OSDV_WPSRç 
2.45 2.70 2.95
OSDV_WPSGç 
(Note T28)ç _{2.45 2.70 2.95} Vp-pç
OSDV_WPSBç 
2.45 2.70 2.95
OSDV_BPSRç 
1.30 1.45 1.60
OSDV_BPSGç 
(Note T29)ç 1.30 1.45 1.60
Vç
OSDV_BPSBç 
1.30 1.45 1.60
V_UOSDR11ç 
0.58 0.64 0.71
V_UOSDG11ç 
0.58 0.64 0.71
V_UOSDB11ç 
0.58 0.64 0.71
V_UOSDR10ç 
0.47 0.53 0.59
V_UOSDG10ç 
0.47 0.53 0.59
V_UOSDB10ç 
V_UOSDR01ç 
0.47 0.53 0.59
(Note T30)ç
Vp-pç
0.31 0.37 0.45
V_UOSDG01ç 
0.31 0.37 0.45
V_UOSDB01ç 
0.31 0.37 0.45
V_UOSDR00ç 
0.19 0.22 0.24
V_UOSDG00ç 
0.19 0.22 0.24
V_UOSDB00ç 
0.19 0.22 0.24
V_brOSD0ç

2.20 2.40 2.60
V_brOSD1ç

V_brOSD2ç

2.05 2.25 2.45
(Note T31)ç
Vç
1.95 2.15 2.35
V_brOSD3ç

1.80 2.00 2.20
V_OSDON1 
V_OSDON2 
Pin 51
Pin 50
2.05 2.30 2.55
V
2.05 2.30 2.55
τ_RYS1ç


15ç 50ç
tP_RYS1ç


20ç 50ç
∆tP_RYS1ç 

0ç 10ç
τ_FYS1ç


10ç 50ç
tP_RYS1ç


30ç 50ç
∆tP_RYS1ç 
τ_RYS2ç


(Note T32)ç

0ç 10ç
nsç
15ç 50ç
tP_RYS2ç


20ç 50ç
∆tP_RYS2ç 

0ç 10ç
τ_FYS2ç


10ç 50ç
tP_RYS2ç


30ç 50ç
∆tP_RYS2ç 

0ç 10ç
OSDACL₁ç 
 0.00ç 
OSDACL₂ç 
OSDACL₃ç 
 0.00ç 
(Note T33)ç
dBç
−6.7ç −4.7ç −2.7ç
OSDACL₄ç 
−16.5ç −14.5ç −12.5ç
36
2003-01-21