MSP432P401R Datasheet, PDF (63/157 Pages) Texas Instruments – Mixed-Signal Microcontrollers

www.ti.com
MSP432P401R, MSP432P401M
SLAS826B – MARCH 2015 – REVISED FEBRUARY 2016
6.2.2 SRAM Zone Memory Map
The SRAM Zone of the device lies in the address range of 0x2000_0000 to 0x3FFF_FFFF. This is further
divided as shown in Figure 6-3.
0x3FFF_FFFF
Reserved
0x2400_0000
SRAM
Bit-Band Alias
Region
0x2200_0000
Reserved
0x2010_0000
0x2000_0000
SRAM Memory
Region
Figure 6-3. SRAM Zone Memory Map
6.2.2.1 SRAM Memory Region
The 1-MB region from 0x2000_0000 to 0x200F_FFFF is defined as the SRAM region. The SRAM memory
accessible in this region is also aliased in the Code zone of the device, thereby allowing efficient access to
the SRAM, both for instruction fetches as well as data reads. Refer to Section 6.3.2 for details about the
SRAM memory.
6.2.2.2 SRAM Bit Band Alias Region
The 32-MB region from 0x2200_0000 through 0x23FF_FFFF forms the bit-band alias region for the 1-MB
SRAM region. Bit-banding is a feature of the Cortex-M4 processor and allows the application to set or
clear individual bits throughout the SRAM memory space without using the pipeline bandwidth of the
processor to carry out an exclusive read-modify-write sequence.
6.2.3 Peripheral Zone Memory Map
The Peripheral Zone of the device lies in the address range of 0x4000_0000 to 0x5FFF_FFFF. This is
further divided as shown in Figure 6-4.
Copyright © 2015–2016, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: MSP432P401R MSP432P401M
Detailed Description
63