MSP432P401R Datasheet, PDF (142/157 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP432P401R, MSP432P401M
SLAS826B – MARCH 2015 – REVISED FEBRUARY 2016
www.ti.com
7.1.3 General Layout Recommendations
• Proper grounding and short traces for external crystal to reduce parasitic capacitance. See the
application report MSP430 32-kHz Crystal Oscillators (SLAA322) for recommended layout guidelines.
• Proper bypass capacitors on DVCC, AVCC, and reference pins if used.
• Avoid routing any high-frequency signal close to an analog signal line. For example, keep digital
switching signals such as PWM or JTAG signals away from the oscillator circuit.
• Refer to the Circuit Board Layout Techniques design guide (SLOA089) for a detailed discussion of
printed-circuit-board (PCB) layout considerations. This document is written primarily about op amps,
but the guidelines are generally applicable for all mixed-signal applications.
• Proper ESD level protection should be considered to protect the device from unintended high-voltage
electrostatic discharge. See the application report MSP430 System-Level ESD Considerations
(SLAA530) for guidelines.
7.1.4 Do's and Don'ts
TI recommends powering AVCC and DVCC pins from the same source. At a minimum, during power up,
power down, and device operation, the voltage difference between AVCC and DVCC must not exceed the
limits specified in the Absolute Maximum Ratings section. Exceeding the specified limits may cause
malfunction of the device.
7.2 Peripheral and Interface-Specific Design Information
7.2.1 ADC14 Peripheral
7.2.1.1 Partial Schematic
Using an External
Positive Reference
+
5 µF 50 nF
Connection to
onboard ground
AVSS
VREF+/VEREF+
VEREF-
Figure 7-3. ADC14 Grounding and Noise Considerations
7.2.1.2 Design Requirements
As with any high-resolution ADC, appropriate PCB layout and grounding techniques should be followed to
eliminate ground loops, unwanted parasitic effects, and noise.
Ground loops are formed when return current from the ADC flows through paths that are common with
other analog or digital circuitry. If care is not taken, this current can generate small unwanted offset
voltages that can add to or subtract from the reference or input voltages of the ADC. The general
guidelines in Section 7.1.1 combined with the connections shown in Section 7.2.1.1 prevent this.
In addition to grounding, ripple and noise spikes on the power-supply lines that are caused by digital
switching or switching power supplies can corrupt the conversion result. A noise-free design using
separate analog and digital ground planes with a single-point connection is recommend to achieve high
accuracy.
Figure 7-3 shows the recommended decoupling circuit when an external voltage reference is used.
142 Applications, Implementation, and Layout
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