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MSP432P401R Datasheet, PDF (58/157 Pages) Texas Instruments – Mixed-Signal Microcontrollers
MSP432P401R, MSP432P401M
SLAS826B – MARCH 2015 – REVISED FEBRUARY 2016
www.ti.com
5.10.11 Memories
Table 5-53. Flash Memory
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST
CONDITIONS
MIN TYP
DVCCPGM/ERS
IPGM/ERS, AVG
IPGM/ERS, PEAK
NEndurance
tRetention
tword
tword, ver
tblock, 0
tblock, 1-(N-1)
tblock, N
tERS
ters2ersver
tnrd2ersver
tpgm2pgmver
tnrd2pgmver
Supply voltage for program or erase
Average supply current from DVCC during program or erase
Peak supply current from DVCC during program or erase
Program or erase endurance
Data retention duration
Word program time without preverify (VER_PRE = 0)(1)
Word program time with preverify (VER_PRE = 1)(1)
TJ = TBD
Block program time for the first data
Block program time for each additional data, except for last data
Block program time for the last data
Segment or mass erase time
Erase to erase verify mode transition time
Normal read to erase verify mode transition time
Program to program verify mode transition time
Normal read to program verify mode transition time
1.62
TBD
20000
20
37
62
11
8
13
2.5
2
11
13.5
13.5
(1) After verify enabled (VER_PST = 1).
Table 5-54. SRAM
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
VCORE = 1.2 V
80
ISRAM_EN
Current consumption of one SRAM bank when enabled
VCORE = 1.4 V
290
VCORE = 1.2 V
27
ISRAM_RET
Current consumption of one SRAM bank under retention
VCORE = 1.4 V
31
tSRAM_EN, one Time taken to enable one SRAM bank
4
tSRAM_DIS, one Time taken to disable one SRAM bank
4
tSRAM_EN, all Time taken to enable all SRAM banks except Bank-0
7
tSRAM_DIS, all Time taken to disable all SRAM banks except Bank-0
4
MAX UNIT
3.7 V
35 mA
50 mA
cycles
years
39 µs
63 µs
12 µs
9 µs
14 µs
3 ms
3 µs
12 µs
15 µs
15 µs
MAX UNIT
nA
nA
5 µs
5 µs
8 µs
5 µs
58
Specifications
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