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MSP432P401R Datasheet, PDF (14/157 Pages) Texas Instruments – Mixed-Signal Microcontrollers
MSP432P401R, MSP432P401M
SLAS826B – MARCH 2015 – REVISED FEBRUARY 2016
www.ti.com
TERMINAL
NAME
PZ
P6.7/
TA2.4/
UCB3SOMI/UCB3SCL/
81
C1.0
DVSS3
82
RSTn/
NMI
83
AVSS2
84
PJ.2/
HFXOUT
85
PJ.3/
HFXIN
86
AVCC2
87
P7.0/
PM_SMCLK/
88
PM_DMAE0
P7.1/
PM_C0OUT/
89
PM_TA0CLK
P7.2/
PM_C1OUT/
90
PM_TA1CLK
P7.3/
PM_TA0.0
91
PJ.4/
TDI/
92
ADC14CLK
PJ.5/
TDO/
93
SWO
SWDIOTMS
94
SWCLKTCK
95
P9.4/
UCA3STE
96
P9.5/
UCA3CLK
97
P9.6/
UCA3RXD/UCA3SOMI
98
P9.7/
UCA3TXD/UCA3SIMO
99
P10.0/
UCB3STE
100
QFN Pad
N/A
Table 4-1. Signal Descriptions (continued)
NO. (2)
ZXH RGC
B7
50
C7 51
B6
52
D6 53
A6
54
A5
55
D5 56
B5
57
C5 58
B4
59
A4
60
B3
61
A3
62
B2
63
A2
64
N/A N/A
N/A N/A
N/A N/A
N/A N/A
N/A N/A
N/A Pad
I/O (1)
DESCRIPTION
General-purpose digital I/O with port interrupt, wake-up and glitch filtering
capability
I/O
TA2 CCR4 capture: CCI4A input, compare: Out4
Slave out, master in – eUSCI_B3 SPI mode
I2C clock – eUSCI_B3 I2C mode
Comparator_E1 input 0
Digital ground supply
I
External reset (active low)
External nonmaskable interrupt
Analog ground supply
I/O
General-purpose digital I/O
Output for high-frequency crystal oscillator HFXT
I/O
General-purpose digital I/O
Input for high-frequency crystal oscillator HFXT
Analog power supply
General-purpose digital I/O
I/O SMCLK clock output
DMA external trigger input
General-purpose digital I/O
I/O Comparator_E0 output
TA0 input clock
General-purpose digital I/O
I/O Comparator_E1 output
TA1 input clock
I/O
General-purpose digital I/O
TA0 CCR0 capture: CCI0A input, compare: Out0
General-purpose digital I/O
I/O JTAG test data input
ADC14 clock output
General-purpose digital I/O
I/O JTAG test data output
Serial wire trace output
I/O Serial wire data input/output (SWDIO)/JTAG test mode select (TMS)
I Serial wire clock input (SWCLK)/JTAG clock input (TCK)
I/O
General-purpose digital I/O
Slave transmit enable – eUSCI_A3 SPI mode
General-purpose digital I/O
I/O Clock signal input – eUSCI_A3 SPI slave mode
Clock signal output – eUSCI_A3 SPI master mode
General-purpose digital I/O
I/O Receive data – eUSCI_A3 UART mode
Slave out, master in – eUSCI_A3 SPI mode
General-purpose digital I/O
I/O Transmit data – eUSCI_A3 UART mode
Slave in, master out – eUSCI_A3 SPI mode
I/O
General-purpose digital I/O
Slave transmit enable – eUSCI_B3 SPI mode
QFN package exposed thermal pad. Connection to VSS is recommended.
14
Terminal Configuration and Functions
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