DS92UT16TUF Datasheet, PDF (78/86 Pages) National Semiconductor (TI) – UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

24.0 Electrical Characteristics (Continued)
UTOPIA Bus Switching Characteristics (Continued)
Over recommended operating supply and temperature ranges unless otherwise specified. (Note 14)
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
t_USETUP Input Data Valid before
C_L = 30 pF, (Figure 31)
4
CLK
Inputs
t_UHOLD Input Data Valid after CLK C_L = 30 pF, (Figure 31)
1
t_ULH
Output Low-to-High
C_L = 30 pF, (Figure 31)
1
Transition Time
t_UHL
Output High-to-Low
C_L = 30 pF, (Figure 31)
1
Transition Time
t_UROS
Output Data Valid before C_L = 30 pF, (Figure 31)
4
CLK
Outputs
t_UROH
Output Data Valid after
C_L = 30 pF, (Figure 31)
1
CLK
t_UHZR
High to TRI-STATE Delay
1
t_ULZR
Low to TRI-STATE Delay
(Figure 32)
1
t_UZHR
TRI-STATE to High Delay
1
t_UZLR
TRI-STATE to Low Delay
1
Pin Name
ATM Mode
PHY Mode
U_TxData[15:0]
Output
Input
U_Tx Parity
Output
Input
U_Tx CLAV[7:4]
Input
*
U_TxCLAV[3:0]
Input
Output
U_TxENB[7:1]
Output
*
U_TxENB[0]
Output
Input
U_TxSOC
Output
Input
U_TxAddr[4:0]
Output
Input
U_RxData[15:0]
Input
Output
U_Rx Parity
Input
Output
U_Rx CLAV[7:4]
Input
*
U_RxCLAV[3:0]
Input
Output
U_RxENB[7:1]
Output
*
U_RxENB[0]
Output
Input
U_RxSOC
Input
Output
U_RxAddr[4:0]
Output
Input
*The extended addressing pins U_TxCLAV[7:4], U_RxCLAV[7:4], U_TxENB[7:1], and
U_RxENB[7:1] are defined for ATM mode only.
LVDS Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified. (Note 14)
Symbol
Parameter
Conditions
Pin/Freq.
Min
Typ
t_LLH
LVDS Low-to-High
R_L = 100, C_L = 10 pF,
300
Transition Time
(Figure 25)
t_LHL
LVDS High-to-Low
R_L = 100, C_L = 10 pF,
300
Transition Time
(Figure 25 )
LVDS_ADout[+,−],
t_RJIT
Random Jitter of LVDS Tx
Clock
LVDS_BDout[+.,−]
60
t_DJIT
Deterministic Jitter of
LVDS Tx Data
Max Units
ns
ns
8
ns
8
ns
ns
ns
16
ns
16
ns
16
ns
16
ns
Max Units
400 ps
400 ps
150 ps
150 ps
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