DS92UT16TUF Datasheet, PDF (20/86 Pages) National Semiconductor (TI) – UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

10.0 Configuration and Traffic
Inhibit Operation (Continued)
The device can now be reconfigured safely. When configu-
ration is completed, then the CTI bit can be cleared by the
processor and normal operation resumed.
Note that the CTI bit is set on either power up or software
reset (See Section 18.3 GENERAL CONTROL AND
STATUS — 0x03 GCS) and therefore the Traffic Inhibit
mechanism is active. When initialization of the device regis-
ters is completed by the processor the CTI bit should be
cleared.
Note that the devices at both ends of the LVDS link must be
configured with the same values for the PDUCFG, USPAL,
and USPAM registers for correct operation.
Note that when configuration of both ends of the link is
complete then CTI must not be disabled for at least two PDU
transport times (i.e. the length of time it takes to transport
two PDUs over the LVDS link). This “CTI disable hold-off
period” allows all PDUs of the old configuration to be re-
ceived and discarded correctly. If this hold-off period is not
respected then an idle cell PDU of the old PDU configuration
may arrive at a device programmed with the new PDU
configuration and incorrectly be interpreted as a valid cell.
Note that any change in the PDU configuration which
changes the byte location of the TC HEC byte will cause the
far end device to fall out of TC delineation. See Figure 6.
11.0 Cell/Frame Delineation and
Descrambler Operation
Each of the two Transmission Convergence Sub-Layer
(TCS) DisAssemblers receives 16-bit data from the associ-
ated LVDS receive section. The TCS DisAssembler must
first find the Transport Container (TC) boundaries, then the
data can be descrambled and the Frame boundaries found.
Once this has been achieved the received data can be
disassembled.
After achieving TC delineation and the Descrambler locking,
then the cell data within each TC is valid and can be passed
to the MTB. If TC delineation is lost, or the Descrambler is
not locked, then cell data is invalid and is not passed to the
MTB.
Frame delineation must be achieved before the bytes of the
F Channel are considered valid. The F Channel consists of
the ECC, Flow Control, BIP, Remote Alarm and Signalling
and Link Label bytes (Section 6.3.6 F Channel Byte Usage
Within the Frame). If Frame delineation is lost then
• the received ECC bytes are considered invalid and are
assumed to retain the last valid values received
• the Flow Control bytes are considered invalid and are
assumed to be all ones, i.e. ‘halt’ all ports
• the Remote Alarm and Signalling byte is considered in-
valid and is assumed to retain the last valid value re-
ceived
• and the Link Label byte is considered invalid and is
assumed to retain the last valid value received.
TC and Frame delineation is achieved using the HEC bytes
of the TC’s. The HEC bytes are not scrambled.
The Descrambler is loaded with the Scrambler sequence on
start-up to achieve lock. The operation of these blocks is
described below.
11.1 TRANSPORT CONTAINER DELINEATION
At the receive end of the LVDS link, the data will appear as
a stream with no indication of Transport Container (TC) or
frame boundaries. TC delineation is achieved by finding
correct HEC’s on the incoming data stream. The TC delin-
eation state diagram is shown in Figure 12.
FIGURE 12. State Diagram for TC Delineation
20031611
C_HUNT — On reset, the TC delineation state machine
starts in the C_HUNT state and TC delineation has not been
achieved. In the C_HUNT state, a HEC is calculated word by
word on a data stream equal in length to the TC Header and
compared against the next received byte. The length of the
TC header is derived from the PDUCFG register (Section
18.5 PDU CONFIGURATION — 0x05 PDUCFG). This pro-
cess is repeated until a correct HEC is detected. When a
single correct HEC has been detected the state machine
moves into the C_PRESYNC state.
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