DS92UT16TUF Datasheet, PDF (5/86 Pages) National Semiconductor (TI) – UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

6.0 Functional Description (Continued)
FIGURE 4. Detailed Connection of One Sub-Port for Extended UTOPIA Level 2
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For the purposes of queueing, the 248 PHY ports are con-
figured as sub-ports of the standard 31 ports so each port/
queue has 8 sub-ports as discussed in Section 6.2.2 Up-
Bridge Multi-Port Traffic Buffer. Each MPHY address
corresponds to a port.
The 5 bit MPHY can address up to 31 PHY ports. At least 3
additional bits are required to give the total of 8 bits neces-
sary for addressing 248 PHY ports. These additional ad-
dress bits can be provided by the user in any of the User
Prepend, Cell Header or UDF1/2 bytes of the cell as shown
in Figure 6. The DS92UT16 is configured to extract/insert the
extra address bits from/to any of these bytes.
PHY polling may be carried out as follows:
• Standard UTOPIA Level 2 with 1 CLAV signal.
— One CLAV polling 31 PHY ports.
• DS92UT16 Extended UTOPIA Level 2 with up to 8 CLAV
signals.
— Each CLAV can poll 31 PHY ports giving a total of 248
PHY ports.
Multiple UTOPIA-LVDS bridge devices can be used in par-
allel to share up to 31 PHY ports among PHYs that are on
separate line cards Figure 5. Each of these ports may have
up to 8 sub-ports. There are constraints on the number of
port addresses used per bridge in such a configuration. See
Section 9.2 MULTIPLE BRIDGE MTB CONFIGURATION
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