DS92UT16TUF Datasheet, PDF (55/86 Pages) National Semiconductor (TI) – UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

18.0 Register Description (Continued)
The Receive Port A Performance Alarms register contains information about the error performance of Port A. When set RAXHEC
and RAXBIP will raise an interrupt if the corresponding interrupt enable bits are set.
• RAXHEC Receive Port A, Excessive HEC Errors. Set = Number of HEC errors counted in RAHECC is equal to or greater than
the threshold set in RAHECT. This bit is set when RAHECC = RAHECT and can only be cleared by a read of this register.
• RAXBIP Receive Port A, Excessive BIP Errors. Set = Number of BIP errors counted in RABIPC is equal to or greater than the
threshold set in RABIPT. This bit is set when RABIPC = RABIPT and can only be cleared by a read of this register.
18.32 RECEIVE PORT A PERFORMANCE INTERRUPT ENABLES — 0x3B RAPIE
7
Reserved
6
Reserved
5
Reserved
TABLE 52. RAPIE
4
Reserved
3
Reserved
2
Reserved
1
RAXHECIE
0
RAXBIPIE
Type:
Read/Write
Software Lock: No
Reset Value: 0x00
This register contains the interrupt enables for the alarms in the RAPA register. Set = interrupt enabled and Clear = interrupt
disabled.
18.33 RECEIVE PORT A REMOTE STATUS AND ALARMS — 0x3C RARA
7
Reserved
6
Reserved
5
Reserved
TABLE 53. RARA
4
RARCS
3
RARLOSA
2
RARLOSB
1
RARBA
0
RARDSLL
Type:
Bits[4:2] and [0] Read only/Clear on Read
Bit[1] Read only
Software Lock: No
Reset Value: 0x0D
The Receive Port A Remote Status and Alarms register contains information on the status of the far-end device, which is
connected to Port A. On a local Loss of Signal on Port A, LLOSA alarm, these bits return to their reset values. When set, the
RARLOSA, RARLOSB, RARBA, and RARDSLL bits will raise an interrupt if the corresponding interrupt enable is set. Also, a
change in value on RARLOSA, RARLOSB, RARDSLL or RARBA will set the RARCS bit. When set, the RARCS bit will raise an
interrupt if the corresponding interrupt enable is set.
• RARCS Receive Port A, Remote Change of Status at far end device LVDS receive Ports.
• RARLOSA Receive Port A, Remote Loss Of Signal at far end device LVDS receive Port A.
• RARLOSB Receive Port A, Remote Loss Of Signal at far end device LVDS receive Port B.
• RARBA Receive Port A, Remote far end device active receive Port. Set = Port B active and Clear = Port A active. Note that
this bit, if set, will not clear on a read of this register.
• RARDSLL Receive Port A, Remote far end device active receive port Descrambler Loss of Lock. Set = Out of Lock and Clear
= Lock.
18.34 RECEIVE PORT A REMOTE INTERRUPT ENABLES — 0x3D RARIE
7
Reserved
6
Reserved
5
Reserved
TABLE 54. RARIE
4
RARCSIE
3
2
RARLOSAIE RARLOSBIE
1
RARBAIE
0
RARDSLLIE
Type:
Read/Write
Software Lock: No
Reset Value: 0x00
This register contains the interrupt enables for the alarms in the RARA register. Set = interrupt enabled and Clear = interrupt
disabled.
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