DS92UT16TUF Datasheet, PDF (64/86 Pages) National Semiconductor (TI) – UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

18.0 Register Description (Continued)
• UCPL3–UCPL0 UCPL3[6] corresponds to port 31 and UCPL0[0] corresponds to port 0. When a bit is set then the port is
connected and will be polled, when clear the port is not connected and will not be polled.
18.61 UTOPIA CONNECTED SUB-PORT LIST — 0xA6 UCSPL
7
UCSPL[7]
6
UCSPL[6]
5
UCSPL[5]
TABLE 81. UCSPL
4
UCSPL[4]
3
UCSPL[3]
2
UCSPL[2]
1
UCSPL[1]
0
UCSPL[0]
Type:
Read/Write
Software Lock: Yes
Reset Value: 0x01
The UCSPL register defines the connected UTOPIA sub-ports within all ports for polling.
• UCSPL UCSPL[7] corresponds to sub-port 7 (CLAV7) and UCSPL[0] corresponds to sub-port 0 (CLAV0). When a bit is set,
then the sub-port is connected and will be polled; when clear, the sub-port is not connected and will not be polled.
18.62 UTOPIA SUB-PORT ADDRESS LOCATION — 0xA7 USPAL
7
Reserved
6
Reserved
5
Reserved
TABLE 82. USPAL
4
USPL[4]
3
USPL[3]
2
USPL[2]
1
USPL[1]
0
USPL[0]
Type:
Read/Write
Software Lock: Yes
Reset Value: 0x00
The UTOPIA Sub-Port Address Location register defines which byte of the PDU header the sub-port address is contained in when
using Extended UTOPIA mode. The PDU header consists of the User Prepend, the ATM cell header and UDF bytes, and so can
be a maximum of 18 bytes. The first of these bytes is denoted as byte 0. The corresponding USPAM register is used to define
which bits in the byte contain the sub-port address.
• USPAL[4:0] Byte number of the PDU header byte which contains the UTOPIA sub-port address.
18.63 UTOPIA SUB-PORT ADDRESS MASK — 0xA8 USPAM
7
USPAM[7]
6
USPAM[6]
5
USPAM[5]
TABLE 83. USPAM
4
USPAM[4]
3
USPAM[3]
2
USPAM[2]
1
USPAM[1]
0
USPAM[0]
Type:
Read/Write
Software Lock: Yes
Reset Value: 0x07
The UTOPIA Sub-Port Address Mask register defines which bits of the PDU header byte defined by the USPAL register contain
the sub-port address.
• USPAM[7:0] Set = This bit location contains valid sub-port address bit.Clear = Ignore this bit location.
Note that only 3 bit locations must be set in this register to give the 3 bit sub-port address location. All other bits must be clear.
By default, bits USPAM[2:0] are set, indicating that the sub-port address is located in bits [2:0] of the PDU header byte indicated
by the USPAL register, with the MSB in bit [2] and the LSB in bit [0]. If USPAM bits [6], [4] and [1] were set, then the sub-port
address would be located in bits [6], [4] and [1] of the PDU header byte indicated by the USPAL register, with the MSB in bit [6]
and the LSB in bit [1].
18.64 MTB QUEUE THRESHOLD — 0xA9 to 0xC7 MTBQT30 to MTBQT0
TABLE 84. MTBQT30–MTBQT0
MTBQT30
0xA9
MTBQT29
0xAA
7
MTBQT30[7]
6
MTBQT30[6]
5
MTBQT30[5]
4
MTBQT30[4]
3
MTBQT30[3]
MTBQT29[7] MTBQT29[6] MTBQT29[5] MTBQT29[4] MTBQT29[3]
2
MTBQT30[2]
MTBQT29[2]
1
MTBQT30[1]
MTBQT29[1]
0
MTBQT30[0]
MTBQT29[0]
MTBQT2 0xC5 MTBQT2[7] MTBQT2[6] MTBQT2[5] MTBQT2[4] MTBQT2[3] MTBQT2[2] MTBQT2[1] MTBQT2[0]
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