DS92UT16TUF Datasheet, PDF (3/86 Pages) National Semiconductor (TI) – UTOPIA-LVDS Bridge for 1.6 Gbps Bi-directional Data Transfers

5.0 Application Overview (Continued)
FIGURE 2. Application Example
20031602
The UTOPIA interface [1. See Section 21.0 References] is
an established standard for connecting Physical Layer de-
vices to ATM Layer devices. However, when the ATM Layer
device and the Physical Layer device(s) are on separate
cards within a piece of equipment, or even on separate
equipment, then the parallel nature of this standard becomes
a limiting factor. See Figure 2.
The solution is to use the DS92UT16, which is a transparent
bridge that extends the UTOPIA bus over a serial LVDS
interface, and is suitable for backplanes and cables. Full
bidirectional flow control is incorporated, allowing back-
pressure to be applied to the source of the ATM cells. The 31
PHY ports available with standard UTOPIA Level 2 may be
extended to 248 ports without additional external circuitry.
The DS92UT16 achieves this by providing as many as 8
ENB and CLAV signals in both receive and transmit direc-
tions when acting as the ATM Layer device. This allows
addressing 248 PHYs that are configured as up to 31 ports
that each have as many as 8 sub-ports.
To aid equipment management and maintenance, the
DS92UT16 passes an embedded ‘Operations, Administra-
tion and Maintenance’ (OAM) channel over the serial link. In
addition, the device provides a number of loopback options
that are both traffic affecting (line loopbacks) and non-traffic
affecting (cell loopbacks), which simplify testing and diag-
nostic activities.
The DS92UT16 has a modified Bus LVDS serial output for
driving cables in point-to-point applications. The cable length
depends on the quality of the cable and the data rate.
Increasing the cable quality, or lowering the LVDS data rate,
increases the maximum possible cable length the device will
drive.
When examining the trade-offs that determine the
DS92UT16 maximum cable drive capability, it is important to
understand that the LVDS data rate on the cable is 18 times
(16 bits plus 2 embedded clock bits) the LVDS_TxClk rate.
For example, a 35 MHz LVDS_TxClk will produce a
630 Mbps data rate, and a 52 MHz clock will produce a
936 Mbps data rate. When using twinaxial grade differential
cable, the cable length can be as long as 16m for the
35 MHz clock and approximately 10m for the 52 MHz clock.
6.0 Functional Description
6.1 UTOPIA INTERFACE
The DS92UT16 has an industry standard UTOPIA interface
[1.] supporting Level 2 and Extended Level 2 operation.
Depending on its position in the bridge link, it may operate as
either the ATM layer or the physical layer in the UTOPIA
protocol.
In Level 2 mode, this interface can be either a 16-bit or an
8-bit wide data path, with both octet and cell level handshak-
ing and operating at a frequency as high as 52 MHz, facili-
tating 622 Mbps (STM4/OC12) line rates.
In UTOPIA Level 2 mode, the device supports Multi-PHY
(MPHY) operation, whereby up to 31 PHY ports may be
connected to an ATM device. The presence of cells and
availability of buffer space is indicated using the CLAV sig-
nals.
UTOPIA Level 2 defines 1 ENB and 1 CLAV signal in each
direction. The DS92UT16 has extended this to 8 ENB and 8
CLAV signals, which enables up to 248 PHY ports to be
connected to an ATM device without additional external cir-
cuitry as shown in Figure 3.
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