82845MP Datasheet, PDF (59/157 Pages) Intel Corporation – Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)

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Intel^® 82845MP/82845MZ Chipset-Mobile (MCH-M)
3.7.16.
DRA[0:7] – DRAM Row Attribute Registers – Device #0
Offset:
Default:
Access:
Size:
70-73h
00h
Read/Write
8 bits
The DRAM Row Attribute Register defines the page sizes to be used when accessing different pairs of
rows. Each nibble of information in the DRA registers describes the page size of a pair of rows:
Row0, 1: 70h
Row2, 3: 71h
Row4, 5: 72h (Not Used; see note)
Row6, 7: 73h (Not Used; see note)
Note: Must contain default value of 00h
76
4 32
0
R
Row attribute for Row1
R Row Attribute for Row0
76
432
0
R
Row attribute for Row3
R Row Attribute for Row2
76
432
0
R
Row attribute for Row5
R Row Attribute for Row4
76
43 2
0
4
Rsv Row attribute for Row7
Rsv Row Attribute for Row6
250687-002
Bit
Description
7
Reserved
6:4
Row Attribute for odd-numbered row: This 3-bit field defines the page size of the corresponding
row.
001: 2 KB
010: 4 KB
011: 8 KB
100: 16 KB
Others: Reserved
3
Reserved
2:0
Row Attribute for even-numbered row: This 3-bit field defines the page size of the corresponding
row.
001: 2 KB
010: 4 KB
011: 8 KB
100: 16 KB
Others: Reserved
Datasheet
59