82845MP Datasheet, PDF (25/157 Pages) Intel Corporation – Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)

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Intel^® 82845MP/82845MZ Chipset-Mobile (MCH-M)
2.4.2. AGP Flow Control Signals
Table 8. AGP Flow Control Signal Descriptions
Signal Name
Type
Description
RBF#
WBF#
I
AGP
I
AGP
Read Buffer Full: Indicates if the master is ready to accept previously requested
low priority read data. When RBF# is asserted, the MCH-M is not allowed to initiate
the return of low priority read data. That is, the MCH-M can only finish returning the
data for the request currently being serviced. RBF# is only sampled at the
beginning of a cycle.
If the AGP master is always ready to accept return read data then it is not required
to implement this signal.
During FRAME# Operation: This signal is not used during AGP FRAME#
operation.
Write-Buffer Full: indicates if the master is ready to accept Fast Write data from
the MCH-M. When WBF# is asserted the MCH-M is not allowed to drive Fast Write
data to the AGP master. WBF# is only sampled at the beginning of a cycle.
If the AGP master is always ready to accept fast write data then it is not required to
implement this signal.
During FRAME# Operation: This signal is not used during AGP FRAME#
operation.
2.4.3. AGP Status Signals
Table 9. AGP Status Signal Descriptions
Signal Name
Type
Description
ST[2:0]
O
AGP
Status: Provides information from the arbiter to an AGP Master on what it may do.
ST[2:0] only have meaning to the master when its GNT# is asserted. When GNT#
is deasserted these signals have no meaning and must be ignored. Refer to the
AGP Interface Specification revision 2.0 for further explanation of the ST[2:0]
values and their meanings.
During FRAME# Operation: These signals are not used during FRAME# based
operation; except that a ‘111’ indicates that the master may begin a FRAME#
transaction.
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Datasheet
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