82845MP Datasheet, PDF (101/157 Pages) Intel Corporation – Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)

R
Intel^® 82845MP/82845MZ Chipset-Mobile (MCH-M)
3.8.22.
ERRCMD1 – Error Command Register – Device #1
Address Offset:
Default Value:
Access:
Size:
40h
00h
Read/Write, Read Only
8 bits
Bit
Description
7:1
Reserved
0
SERR on Receiving Target Abort (SERTA): When this bit is 1 the MCH-M generates an SERR
message over hub interface A upon receiving a target abort on AGP. When this bit is set to 0, the
MCH-M does not assert an SERR message upon receipt of a target abort on AGP. SERR
messaging for Device 1 is globally enabled in the PCICMD1 register.
250687-002
Datasheet
101