82845MP Datasheet, PDF (4/157 Pages) Intel Corporation – Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)

Intel^®82845MP/82845MZ Chipset-Mobile (MCH-M)
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3.7.5.
RID – Revision Identification Register – Device #0..................................... 54
3.7.6.
SUBC – Sub-Class Code Register – Device #0.......................................... 54
3.7.7.
BCC – Base Class Code Register – Device #0........................................... 54
3.7.8.
MLT – Master Latency Timer Register – Device #0.................................... 55
3.7.9.
HDR – Header Type Register – Device #0 ................................................. 55
3.7.10. APBASE – Aperture Base Configuration Register – Device #0 .................. 56
3.7.11. SVID – Subsystem Vendor ID – Device #0 ................................................. 57
3.7.12. SID – Subsystem ID – Device #0 ................................................................ 57
3.7.13. CAPPTR – Capabilities Pointer – Device #0............................................... 57
3.7.14. AGPM- AGP Miscellaneous Configuration.................................................. 58
3.7.15. DRB[0:7] – DRAM Row Boundary Registers – Device #0 .......................... 58
3.7.16. DRA[0:7] – DRAM Row Attribute Registers – Device #0 ............................ 59
3.7.17. DRT – DRAM Timing Register – Device #0 ................................................ 60
3.7.18. DRC – DRAM Controller Mode Register – Device #0 ................................. 61
3.7.19. DERRSYN – DRAM Error Syndrome Register ........................................... 63
3.7.20. EAP – Error Address Pointer Register – Device #0 .................................... 63
3.7.21. PAM[0:6] – Programmable Attribute Map Registers – Device #0 ............... 64
3.7.22. FDHC – Fixed DRAM Hole Control Register – Device #0........................... 68
3.7.23. SMRAM – System Management RAM Control Register – Device #0 ......... 69
3.7.24. ESMRAMC – Extended System Mgmt RAM Control Register
– Device #0 ................................................................................................. 70
3.7.25. ACAPID – AGP Capability Identifier Register – Device #0.......................... 71
3.7.26. AGPSTAT – AGP Status Register – Device #0 .......................................... 72
3.7.27. AGPCMD – AGP Command Register – Device #0..................................... 73
3.7.28. AGPCTRL – AGP Control Register............................................................. 74
3.7.29. APSIZE – Aperture Size – Device #0 .......................................................... 75
3.7.30. ATTBASE – Aperture Translation Table Base Register – Device #0.......... 76
3.7.31. AMTT – AGP Interface Multi-Transaction Timer Register – Device #0 ...... 77
3.7.32. LPTT – AGP Low Priority Transaction Timer Register – Device #0............ 78
3.7.33. TOM – Top of Low Memory Register – Device #0 ...................................... 79
3.7.34. MCH-MCFG – MCH-M Configuration Register – Device #0 ....................... 80
3.7.35. ERRSTS – Error Status Register – Device #0 ............................................ 81
3.7.36. ERRCMD – Error Command Register – Device #0 .................................... 82
3.7.37. SMICMD – SMI Command Register – Device #0 ....................................... 83
3.7.38. SCICMD – SCI Command Register – Device #0 ........................................ 83
3.7.39. SKPD – Scratchpad Data – Device #0........................................................ 84
3.7.40. CAPID – Product Specific Capability Identifier ............................................ 84
3.8. AGP Bridge Registers – Device #1 ............................................................................... 85
3.8.1.
VID1 – Vendor Identification Register – Device #1 ..................................... 87
3.8.2.
DID1 – Device Identification Register – Device #1...................................... 87
3.8.3.
PCICMD1 – PCI-PCI Command Register – Device #1............................... 88
3.8.4.
PCISTS1 – PCI-PCI Status Register – Device #1....................................... 89
3.8.5.
RID1 – Revision Identification Register – Device #1................................... 90
3.8.6.
SUBC1- Sub-Class Code Register – Device #1.......................................... 90
3.8.7.
BCC1 – Base Class Code Register – Device #1......................................... 91
3.8.8.
MLT1 – Master Latency Timer Register – Device #1.................................. 91
3.8.9.
HDR1 – Header Type Register – Device #1 ............................................... 91
3.8.10. PBUSN1 – Primary Bus Number Register – Device #1 .............................. 92
3.8.11. SBUSN1 – Secondary Bus Number Register – Device #1 ......................... 92
3.8.12. SUBUSN1 – Subordinate Bus Number Register – Device #1 .................... 92
3.8.13. SMLT1 – Secondary Master Latency Timer Register – Device #1 ............. 93
3.8.14. IOBASE1 – I/O Base Address Register – Device #1 .................................. 94
3.8.15. IOLIMIT1 – I/O Limit Address Register – Device #1 ................................... 94
3.8.16. SSTS1 – Secondary PCI-PCI Status Register – Device #1 ........................ 95
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Datasheet
250687-002