82845MP Datasheet, PDF (49/157 Pages) Intel Corporation – Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)

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Intel^® 82845MP/82845MZ Chipset-Mobile (MCH-M)
Table 21. MCH-M Configuration Space for Device #0
Address
Offset
Register
Symbol
Register Name
00-01h
02-03h
04-05h
06-07h
08h
VID
DID
PCICMD
PCISTS
RID
Vendor Identification
Device Identification
PCI Command Register
PCI Status Register
Revision Identification
09h
0Ah
0Bh
0Dh
0Eh
0Fh
10-13h
14-2Bh
2C-2Dh
2E-2Fh
30-33h
34h
35-50h
51h
52-5Fh
60-67h
68-6Fh
70-73h
73-77h
78-7Bh
7C-7Fh
80-85h
86h
87-8Bh
8C-8Fh
90-96h
250687-002
97h
98-9Ch
SUBC
BCC
MLT
HDR
APBASE
SVID
SID
CAPPTR
AGPM
Reserved.
DRB[0:7]
DRA[0:7]
DRT
DRC
DERRSYN
EAP
PAM[0:6]
FDHC
Reserved.
Sub-Class Code
Base Class Code
Master Latency Timer
Header Type
Reserved.
Aperture Base Configuration
Reserved.
Subsystem Vendor Identification
Subsystem Identification
Reserved.
Capabilities Pointer
Reserved.
AGP Miscellaneous Config
DRAM Row Boundary Registers
Reserved.
DRAM Row Attribute Registers
Reserved.
DRAM Timing Register
DRAM Controller Mode Register
Reserved.
DRAM Error Syndrome Register
Reserved.
Error Address Pointer Register
Programmable Attribute Map Registers
Fixed DRAM Hole Control Register
Reserved
Datasheet
Default
Value
8086h
1A30h
0006h
0090h
Dependent on
silicon
revision
Access
RO
RO
RO, R/W
RO, R/WC
RO
00h
RO
06h
RO
00h
RO
00h
RO
00000008h
RO, R/W
0000h
0000h
R/WO
R/WO
A0h
RO
00h
RW
00h
R/W
00h
R/W
00000010h
0000h
R/W
R/W, RO
00h
RO
00000000h
00000000000
000h
00h
RO
RO, R/W
RO, R/W
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