82845MP Datasheet, PDF (46/157 Pages) Intel Corporation – Intel 845 Family Chipset-Mobile 82845MP/82845MZ Chipset Memory Controller Hub Mobile (MCH-M)

Intel^®82845MP/82845MZ Chipset-Mobile (MCH-M)
R
3.6.4.
CSBSTR – Strength Control Register for CS# Signal Group
Address Offset:
Default Value:
Access:
Size:
32h
00h
Read Only, Read/Write
8 bits
This register controls the drive strength of the I/O buffers for the CS# signal group. This group has two
possible loadings depending on the width of SDRAM devices used in each Row of memory (x8 or x16).
The proper strength can be independently programmed for each configuration. The actual strength used
for each signal is determined by the DRAM Width register (offset 2Ch).
Bit
Descriptions
7
Reserved
6:4
CS# x16 Strength Control: Sets drive strength as shown below:
000 = 0.75 X (default)
001 = 1.00 X
010 = 1.25 X
011 = 1.50 X
100 = 2.00 X
101 = 2.50 X
110 = 3.00 X
111 = 4.00 X
3
Reserved
2:0
CS# x8 Strength Control: Sets drive strength as shown below:
000 = 0.75 X (default)
001 = 1.00 X
010 = 1.25 X
011 = 1.50 X
100 = 2.00 X
101 = 2.50 X
110 = 3.00 X
111 = 4.00 X
46
Datasheet
250687-002