HYB18T512400AF Datasheet, PDF (9/117 Pages) Infineon Technologies AG – 512-Mbit DDR2 SDRAM

HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
512-Mbit DDR2 SDRAM
List of Figures
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Pin Configuration for ×4 components, P-TFBGA-60 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Pin Configuration for ×8 components, P-TFBGA-60 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Pin Configuration for ×16 components, P-TFBGA-84 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Block Diagram 32 Mbit × 4 I/O ×4 Internal Memory Banks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Block Diagram 16 Mbit × 8 I/O ×4 Internal Memory Banks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Block Diagram 8 Mbit × 16 I/O ×4 Internal Memory Banks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Simplified State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Initialization Sequence after Power up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
OCD Impedance Adjustment Flow Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Timing Diagram Adjust Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Timing Diagram Drive Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Functional Representation of ODT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
ODT Timing for Active and Standby (Idle) Modes (Synchronous ODT timings). . . . . . . . . . . . . . . 41
ODT Timing for Precharge Power-Down and Active Power-Down Mode. . . . . . . . . . . . . . . . . . . . 42
ODT Mode Entry Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
ODT Mode Exit Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Bank Activate Command Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Read Timing Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Activate to Read Timing Example: Read followed by a write to the same bank . . . . . . . . . . . . . . 47
Read to Write Timing Example: Read followed by a write to the same bank . . . . . . . . . . . . . . . . 47
Read to Write Timing Example: Read followed by a write to the same bank . . . . . . . . . . . . . . . . 48
Read to Write Timing Example: Read followed by a write to the same bank . . . . . . . . . . . . . . . . 48
Write to Read Timing Example: Write followed by a read to the same bank . . . . . . . . . . . . . . . . . 48
Basic Read Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Read Operation Example 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Read Operation Example 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Read followed by Write Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Seamless Read Operation Example 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Seamless Read Operation Example 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Basic Write Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Write Operation Example 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Write Operation Example 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Write followed by Read Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Seamless Write Operation Example 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Seamless Write Operation Example 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Write Data Mask Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Write Operation with Data Mask Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Read Interrupt Timing Example 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Write Interrupt Timing Example 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Read Operation Followed by Precharge Example 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Read Operation Followed by Precharge Example 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Read Operation Followed by Precharge Example 3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Read Operation Followed by Precharge Example 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Read Operation Followed by Precharge Example 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Write followed by Precharge Example 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Write followed by Precharge Example 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Read with Auto-Precharge Example 1, followed by an Activation to the Same Bank (t_RC Limit) . . 63
Read with Auto-Precharge Example 2, followed by an Activation to the Same Bank (t_RAS Limit) . 63
Read with Auto-Precharge Example 3, followed by an Activation to the Same Bank . . . . . . . . . . 64
Read with Auto-Precharge Example 4, followed by an Activation to the Same Bank, . . . . . . . . . . 64
Write with Auto-Precharge Example 1 (t_RC Limit) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Write with Auto-Precharge Example 2 (WR + t_RP Limit) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Auto Refresh Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Data Sheet
9
Rev. 1.3, 2005-01
09112003-SDM9-IQ3P