HYB18T512400AF Datasheet, PDF (43/117 Pages) Infineon Technologies AG – 512-Mbit DDR2 SDRAM

HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
512-Mbit DDR2 SDRAM
Functional Description
CK, CK
CKE
T-5
T-4
T-3
T-2
T-1
T0
T1
T2
tANPD (3 tck)
t_IS
ODT turn-off, tANPD >= 3 tck :
t
IS
ODT
ODT turn-off, tANPD <3 tck :
ODT
RTT
tAOFD
ODT turn-on, tANPD >= 3 tck :
t_IS
ODT
ODT turn-on, tANPD < 3 tck :
ODT
Figure 15 ODT Mode Entry Timing Diagram
RTT
tAOFPDmax
tAOND
t
IS
tAONPDmax
RTT
RTT
ODT03
Synchronous
timings apply
Asynchronous
timings apply
Synchronous
timings apply
Asynchronous
timings apply
Data Sheet
43
Rev. 1.3, 2005-01
09112003-SDM9-IQ3P