HYB18T512400AF Datasheet, PDF(25/117 Page) Infineon Technologies AG

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HYB18T512400AF Datasheet, PDF (25/117 Pages) Infineon Technologies AG – 512-Mbit DDR2 SDRAM

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09112003-SDM9-IQ3P

Rev. 1.3, 2005-01

Data Sheet

device; it does not represent an actual circuit

implementation.

3. DM is a unidirectional signal (input only), but is

internally loaded to match the load of the

bidirectional DQ and DQS signals.

1. 64Mb Ã 8 Organisation with 14 Row, 2 Bank and 10

Column External Adresses

2. This Functional Block Diagram is intended to

facilitate user understanding of the operation of the

Note:

Figure 5 Block Diagram 16 Mbit Ã 8 I/O Ã4 Internal Memory Banks

-0" 4

2O W ! D DRE SS- 5 8

2E A D,A TCH

2E FRESH#O UNTER

!D DRES S2 E GIS TER

2E C EIV ERS

/$4 # O NTROL

$RIVE RS

HYB18T512[40/80/16]0AFâ[3/3S/3.7/5]

512-Mbit DDR2 SDRAM

Pin Configuration and Block Diagrams

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