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HYB18T512400AF Datasheet, PDF (113/117 Pages) Infineon Technologies AG – 512-Mbit DDR2 SDRAM | |||
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HYB18T512[40/80/16]0AFâ[3/3S/3.7/5]
512-Mbit DDR2 SDRAM
AC Timing Measurement Conditions
Table 61 Derating Values for Data Setup and Hold Time of Single-ended DQS (DDR2-400 & -533)
DQS, DQS Single-ended Slew Rate1)2)
2.0 V/ns 1.5 V/ns 1.0 V/ns 0.9 V/ns 0.8 V/ns 0.7 V/ns 0.6 V/ns 0.5 V/ns 0.4 V/ns
â
tDS1
â
tDH1
â
tDS1
â
tDH1
â
tDS1
ââââââ â â â â â â â
tDH1 tDS1 tDH1 tDS1 tDH1 tDS1 tDH1 tDS1 tDH1 tDS1 tDH1 tDS1 tDH1
2.0 +188 +188 +167 +146 +125 +63 â â â â â â â â â â â â
1.5 +146 +167 +125 +125 +83 +42 +81 +43 â â â â â â â â â â
1.0 +63 +125 +42 +83 0 0 -2 +1 -7 -13 â â â â â â â â
0.9 â â +31 +69 -11 -14 -13 -13 -18 -27 -29 -45 â â â â â â
0.8 â â â â -25 -31 -27 -30 -32 -44 -43 -62 -60 â86 â â â â
0.7 â â â â â â -45 -53 -50 -67 -61 -85 -78 -109 -108 -152 â â
0.6 â â â â â â â â -74 -96 -85 -114 -102 -138 -132 -181 -183 -246
0.5 â â â â â â â â â â -128 -156 -145 -180 -175 -223 -226 -288
0.4 â â â â â â â â â â â â -210 -243 -240 -286 -291 -351
1) All units in ps.
2) For all input signals tDS1(total) = tDS1(base) + âtDS1 and tDH1(total) = tDH1(base) + âtDH1
Data Sheet
113
Rev. 1.3, 2005-01
09112003-SDM9-IQ3P
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