HYB18T512400AF Datasheet, PDF (57/117 Pages) Infineon Technologies AG – 512-Mbit DDR2 SDRAM

HYB18T512[40/80/16]0AF–[3/3S/3.7/5]
512-Mbit DDR2 SDRAM
Functional Description
3.21
Burst Interruption
Interruption of a read or write burst is prohibited for
burst length of 4 and only allowed for burst length of 8
under the following conditions:
1. A Read Burst can only be interrupted by another
Read command. Read burst interruption by a Write
or Precharge Command is prohibited.
2. A Write Burst can only be interrupted by another
Write command. Write burst interruption by a Read
or Precharge Command is prohibited.
3. Read burst interrupt must occur exactly two clocks
after the previous Read command. Any other Read
burst interrupt timings are prohibited.
4. Write burst interrupt must occur exactly two clocks
after the previous Write command. Any other Read
burst interrupt timings are prohibited.
5. Read or Write burst interruption is allowed to any
bank inside the DDR2 SDRAM.
6. Read or Write burst with Auto-Precharge enabled is
not allowed to be interrupted.
7. Read burst interruption is allowed by a Read with
Auto-Precharge command.
8. Write burst interruption is allowed by a Write with
Auto-Precharge command.
9. All command timings are referenced to burst length
set in the mode register. They are not referenced to
the actual burst. For example, Minimum Read to
Precharge timing is AL + BL/2 where BL is the burst
length set in the mode register and not the actual
burst (which is shorter because of interrupt).
Minimum Write to Precharge timing is WL + BL/ 2 +
t_WR, where t_WR starts with the rising clock after the
un-interrupted burst end and not from the end of the
actual burst end.
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK, CK
CMD
READ A
NOP
READ B
NOP
NOP
NOP
NOP
NOP
NOP
NOP
DQS,
DQS
DQ
Dout A0 Dout A1 Dout A2 Dout A3 Dout B0 Dout B1 Dout B2 Dout B3 Dout B4 Dout B5 Dout B6 Dout B7
RBI
Figure 38 Read Interrupt Timing Example 1
CL = 3, AL = 0, RL = 3, BL = 8
T0
T1
T2
T3
T4
T5
T6
T7
T8
CK, CK
CMD
NOP
W R ITE A
NOP
W RITE B
NOP
NOP
NOP
NOP
NOP
NOP
DQS,
DQS
DQ
Din A0 Din A1 Din A2 Din A3 Din B0 Din B1 Din B2 Din B3 Dout B4 Din B5 Din B6 Din B7
WBI
Figure 39 Write Interrupt Timing Example 2
CL = 3, AL = 0, WL = 2, BL = 8
Data Sheet
57
Rev. 1.3, 2005-01
09112003-SDM9-IQ3P