MC9S08GB60 Datasheet, PDF (97/290 Pages) Motorola, Inc – Microcontrollers

Chapter 7 Internal Clock Generator (ICG) Module
The MC9S08GB/GT microcontroller provides one internal clock generation (ICG) module to create the
system bus frequency. All functions described in this section are available on the MC9S08GB/GT
microcontroller. The EXTAL and XTAL pins share port G bits 2 and 1, respectively. Analog supply lines
V_DDA and V_SSA are internally derived from the MCU’s V_DD and V_SS pins. Electrical parametric data for
the ICG may be found in Appendix A, “Electrical Characteristics.”
SYSTEM
CONTROL
LOGIC
ICGERCLK
RTI
FFE
TPM1
TPM2
IIC1
SCI1
SCI2
SPI1
÷2
ICG
FIXED FREQ CLOCK (XCLK)
ICGOUT
÷2
ICGLCLK*
BUSCLK
CPU
BDC
* ICGLCLK is the alternate BDC clock source for the MC9S08GB/GT.
ATD1
RAM
ATD has min and max
frequency requirements.
See Chapter 1, “Introduction”
and Appendix A, “Electrical
Characteristics.
FLASH
FLASH has frequency
requirements for program
and erase operation.
See Appendix A, “Electrical
Characteristics.
Figure 7-1. System Clock Distribution Diagram
NOTE
Freescale Semiconductor recommends that FLASH location $FFBE be
reserved to store a nonvolatile version of ICGTRM. This will allow
debugger and programmer vendors to perform a manual trim operation and
store the resultant ICGTRM value for users to access at a later time.
MC9S08GB/GT Data Sheet, Rev. 2.3
Freescale Semiconductor
97