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| MC9S08GB60 Datasheet, PDF (111/290 Pages) Motorola, Inc – Microcontrollers | |||
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Initialization/Application Information
Table 7-5. ICGOUT Frequency Calculation Options
Clock Scheme
SCM â self-clocked mode (FLL bypassed
internal)
FBE â FLL bypassed external
FEI â FLL engaged internal
FEE â FLL engaged external
fICGOUT(1)
fICGDCLK / R
fext / R
(fIRG / 7)* 64*N / R
fext * P * N / R
P
NA
NA
64
Range = 0 ; P = 64
Range = 1; P = 1
Note
Typical fICGOUT = 8 MHz
out of reset
Typical fIRG = 243 kHz
1. Ensure that fICGDCLK, which is equal to fICGOUT * R, does not exceed fICGDCLKmax.
MFD Value
000
001
010
011
100
101
110
111
Table 7-6. MFD and RFD Decode Table
Multiplication Factor (N)
4
6
8
10
12
14
16
18
RFD
000
001
010
011
100
101
110
111
Division Factor (R)
÷1
÷2
÷4
÷8
÷16
÷32
÷64
÷128
Register
ICGC1
ICGC2
ICGS1
ICGS2
ICGFLTU
ICGFLTL
ICGTRM
Bit 7
6
0
RANGE
LOLRE
CLKST
0
0
0
0
5
REFS
MFD
REFST
0
0
4
3
CLKS
LOCRE
LOLS
LOCK
0
0
0
FLT
TRIM
2
1
OSCSTEN
0(1)
RFD
LOCS
ERCS
0
0
FLT
Bit 0
0
ICGIF
DCOS
= Unimplemented or Reserved
1. This bit is reserved for Freescale Semiconductor internal use only. Any write operations to this register should
write a 0 to this bit.
Figure 7-7. ICG Register Set
MC9S08GB/GT Data Sheet, Rev. 2.3
Freescale Semiconductor
111
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