MC9S08GB60 Datasheet, PDF (71/290 Pages) Motorola, Inc – Microcontrollers

Reset, Interrupt, and System Control Registers and Control Bits
LVD — Low Voltage Detect
If the LVD reset is enabled (LVDE = LVDRE = 1) and the supply drops below the LVD trip voltage,
an LVD reset occurs. The LVD function is disabled when the MCU enters stop. To maintain LVD
operation in stop, the LVDSE bit must be set.
1 = Reset caused by LVD trip or POR.
0 = Reset not caused by LVD trip or POR.
5.8.3 System Background Debug Force Reset Register (SBDFR)
This register contains a single write-only control bit. A serial background command such as
WRITE_BYTE must be used to write to SBDFR. Attempts to write this register from a user program are
ignored. Reads always return $00.
Bit 7
6
5
4
3
2
1
Read: 0
0
0
0
0
0
0
Write:
Reset: 0
0
0
0
0
0
0
= Unimplemented or Reserved
1 _{BDFR is writable only through serial background debug commands, not from user programs.}
Figure 5-4. System Background Debug Force Reset Register (SBDFR)
Bit 0
0
BDFR¹
0
BDFR — Background Debug Force Reset
A serial background mode command such as WRITE_BYTE allows an external debug host to force a
target system reset. Writing 1 to this bit forces an MCU reset. This bit cannot be written from a user
program.
5.8.4 System Options Register (SOPT)
This register may be read at any time. Bits 3 and 2 are unimplemented and always read 0. This is a
write-once register so only the first write after reset is honored. Any subsequent attempt to write to SOPT
(intentionally or unintentionally) is ignored to avoid accidental changes to these sensitive settings. SOPT
should be written during the user’s reset initialization program to set the desired controls even if the desired
settings are the same as the reset settings.
Bit 7
6
5
4
3
2
Read:
COPE
Write:
COPT STOPE
0
0
Reset:
1
1
0
1
0
0
= Unimplemented or Reserved
Figure 5-5. System Options Register (SOPT)
1
Bit 0
BKGDPE
1
1
MC9S08GB/GT Data Sheet, Rev. 2.3
Freescale Semiconductor
71