MC9S08GB60 Datasheet, PDF (15/290 Pages) Motorola, Inc – Microcontrollers

Section Number
Title
Page
14.2.1.2 ATD Reference Pins — V_REFH, V_REFL ........................................................223
14.2.1.3 ATD Supply Pins — V_DDAD, V_SSAD ...........................................................223
14.3 Functional Description ..................................................................................................................223
14.3.1 Mode Control .................................................................................................................223
14.3.2 Sample and Hold ............................................................................................................224
14.3.3 Analog Input Multiplexer ..............................................................................................226
14.3.4 ATD Module Accuracy Definitions ...............................................................................226
14.4 Resets ............................................................................................................................................229
14.5 Interrupts .......................................................................................................................................229
14.6 ATD Registers and Control Bits ....................................................................................................229
14.6.1 ATD Control (ATDC) ....................................................................................................230
14.6.2 ATD Status and Control (ATD1SC) ..............................................................................232
14.6.3 ATD Result Data (ATD1RH, ATD1RL) ........................................................................234
14.6.4 ATD Pin Enable (ATD1PE) ...........................................................................................234
Chapter 15
Development Support
15.1 Introduction ...................................................................................................................................235
15.2 Features .........................................................................................................................................236
15.3 Background Debug Controller (BDC) ..........................................................................................237
15.3.1 BKGD Pin Description ..................................................................................................237
15.3.2 Communication Details .................................................................................................238
15.3.3 BDC Commands ............................................................................................................242
15.3.4 BDC Hardware Breakpoint ............................................................................................244
15.4 On-Chip Debug System (DBG) ....................................................................................................245
15.4.1 Comparators A and B ....................................................................................................245
15.4.2 Bus Capture Information and FIFO Operation ..............................................................245
15.4.3 Change-of-Flow Information .........................................................................................246
15.4.4 Tag vs. Force Breakpoints and Triggers ........................................................................246
15.4.5 Trigger Modes ................................................................................................................247
15.4.6 Hardware Breakpoints ...................................................................................................249
15.5 Registers and Control Bits .............................................................................................................249
15.5.1 BDC Registers and Control Bits ....................................................................................249
15.5.1.1 BDC Status and Control Register (BDCSCR) ..............................................250
15.5.1.2 BDC Breakpoint Match Register (BDCBKPT) ............................................251
15.5.2 System Background Debug Force Reset Register (SBDFR) .........................................251
15.5.3 DBG Registers and Control Bits ....................................................................................252
15.5.3.1 Debug Comparator A High Register (DBGCAH) ........................................252
15.5.3.2 Debug Comparator A Low Register (DBGCAL) .........................................252
15.5.3.3 Debug Comparator B High Register (DBGCBH) .........................................252
15.5.3.4 Debug Comparator B Low Register (DBGCBL) ..........................................252
MC9S08GB/GT Data Sheet, Rev. 2.3
Freescale Semiconductor
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