MC9S08GB60 Datasheet, PDF (233/290 Pages) Motorola, Inc – Microcontrollers

ATD Registers and Control Bits
CCF — Conversion Complete Flag
The CCF is a read-only bit which is set each time a conversion is complete. The CCF bit is cleared
whenever the ATD1SC register is written. It is also cleared whenever the result registers, ATD1RH or
ATD1RL, are read.
1 = Current conversion is complete.
0 = Current conversion is not complete.
ATDIE — ATD Interrupt Enabled
When this bit is set, an interrupt is generated upon completion of an ATD conversion. At this time, the
result registers contain the result data generated by the conversion. The interrupt will remain pending
as long as the conversion complete flag CCF is set. If the ATDIE bit is cleared, then the CCF bit must
be polled to determine when the conversion is complete. Note that system reset clears pending
interrupts.
1 = ATD interrupt enabled.
0 = ATD interrupt disabled.
ATDCO — ATD Continuous Conversion
When this bit is set, the ATD will convert samples continuously and update the result registers at the
end of each conversion. When this bit is cleared, only one conversion is completed between writes to
the ATD1SC register.
1 = Continuous conversion mode.
0 = Single conversion mode.
ATDCH — Analog Input Channel Select
This field of bits selects the analog input channel whose signal is sampled and converted to digital
codes. Table 14-5 lists the coding used to select the various analog input channels.
Table 14-5. Analog Input Channel Select Coding
ATDCH
00
01
02
03
04
05
06
07
08–1D
1E
1F
Analog Input Channel
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
Reserved (default to V_REFL)
V_REFH
V_REFL
MC9S08GB/GT Data Sheet, Rev. 2.3
Freescale Semiconductor
233