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MC9S08GB60 Datasheet, PDF (103/290 Pages) Motorola, Inc – Microcontrollers
Functional Description
ICG
EXTAL
VSS
XTAL
RS
C1
C2
RF
CRYSTAL OR RESONATOR
Figure 7-5. External Frequency Reference Connection
7.3 Functional Description
This section provides a functional description of each of the five operating modes of the ICG. Also covered
are the loss of clock and loss of lock errors and requirements for entry into each mode. The ICG is very
flexible, and in some configurations, it is possible to exceed certain clock specifications. When using the
FLL, configure the ICG so that the frequency of ICGDCLK does not exceed its maximum value to ensure
proper MCU operation.
7.3.1 Off Mode (Off)
Normally when the CPU enters stop mode, the ICG will cease all clock activity and is in the off state.
However there are two cases to consider when clock activity continues while the CPU is in stop mode.
7.3.1.1 BDM Active
When the BDM is enabled, the ICG continues activity as originally programmed. This allows access to
memory and control registers via the BDC controller.
7.3.1.2 OSCSTEN Bit Set
When the oscillator is enabled in stop mode (OSCSTEN = 1), the individual clock generators are enabled
but the clock feed to the rest of the MCU is turned off. This option is provided to avoid long oscillator
startup times if necessary, or to run the RTI from the oscillator during stop3.
MC9S08GB/GT Data Sheet, Rev. 2.3
Freescale Semiconductor
103