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MC9S08GB60 Datasheet, PDF (226/290 Pages) Motorola, Inc – Microcontrollers
Analog-to-Digital Converter (ATD) Module
14.3.3 Analog Input Multiplexer
The analog input multiplexer selects one of the eight external analog input channels to generate an analog
sample. The analog input multiplexer includes negative stress protection circuitry which prevents
cross-talk between channels when the applied input potentials are within specification. Only analog input
signals within the potential range of VREFL to VREFH (ATD reference potentials) will result in valid ATD
conversions.
14.3.4 ATD Module Accuracy Definitions
Figure 14-4 illustrates an ideal ATD transfer function. The horizontal axis represents the ATD input
voltage in millivolts. The vertical axis the conversion result code. The ATD is specified with the following
figures of merit:
• Number of bits (N) — The number of bits in the digitized output
• Resolution (LSB) — The resolution of the ATD is the step size of the ideal transfer function. This
is also referred to as the ideal code width, or the difference between the transition voltages to a
given code and to the next code. This unit, known as 1LSB, is equal to
1LSB = (VREFH – VREFL) / 2N
Eqn. 14-5
•
Inherent quantization error (EQ) — This is the error caused by the division
straight-line transfer function into the quantized ideal transfer function with
of the perfect ideal
2N steps. This error
is
± 1/2 LSB.
• Differential non-linearity (DNL) — This is the difference between the current code width and the
ideal code width (1LSB). The current code width is the difference in the transition voltages to the
current code and to the next code. A negative DNL means the transfer function spends less time at
the current code than ideal; a positive DNL, more. The DNL cannot be less than –1.0; a DNL of
greater than 1.0 reduces the effective number of bits by 1.
• Integral non-linearity (INL) — This is the difference between the transition voltage to the current
code and the transition to the corresponding code on the adjusted transfer curve. INL is a measure
of how straight the line is (how far it deviates from a straight line). The adjusted ideal transition
voltage is:
Eqn. 14-6
Adjusted Ideal Trans. V =
(Current Code
2N
- 1/2)
* ((VREFH +
EFS)
- (VREFL
+ EZS))
• Zero scale error (EZS) — This is the difference between the transition voltage to the first valid code
and the ideal transition to that code. Normally, it is defined as the difference between the actual and
ideal transition to code $001, but in some cases the first transition may be to a higher code. The
ideal transition to any code is:
(Current Code - 1/2)
Ideal Transition V =
2N
*(VREFH – VREFL)
Eqn. 14-7
MC9S08GB/GT Data Sheet, Rev. 2.3
226
Freescale Semiconductor