MC9S08GB60 Datasheet, PDF (114/290 Pages) Motorola, Inc – Microcontrollers

Internal Clock Generator (ICG) Module
ICGC2 = $30 (%00110000)
Bit 7 LOLRE
Bit 6:4 MFD
Bit 3 LOCRE
Bit 2:0 RFD
0 Generates an interrupt request on loss of lock
011 Sets the MFD multiplication factor to 10
0 Generates an interrupt request on loss of clock
000 Sets the RFD division factor to ÷1
ICGS1 = $xx
This is read only except for clearing interrupt flag
ICGS2 = $xx
This is read only. Should read DCOS before performing any time critical tasks
ICGFLTLU/L = $xx
Not used in this example
ICGTRM
Not used in this example
RECOVERY FROM
RESET, STOP1, OR STOP2
RECOVERY
FROM STOP3
INITIALIZE ICG
ICG1 = $7A
ICG2 = $30
SERVICE INTERRUPT
SOURCE (f_Bus = 4 MHz)
CHECK
NO
FLL LOCK STATUS
LOCK = 1?
YES
CONTINUE
CHECK
FLL LOCK STATUS ^NO
LOCK = 1?
YES
CONTINUE
Figure 7-9. ICG Initialization and Stop Recovery for Example #2
7.4.4 Example #3: No External Crystal Connection, 5.4 MHz Bus
Frequency
In this example, the FLL will be used (in FEI mode) to multiply the internal 243 kHz (approximate)
reference clock up to 10.8 MHz to achieve 5.4 MHz bus frequency. This system will also use the trim
function to fine tune the frequency based on an external reference signal.
After the MCU is released from reset, the ICG is in self-clocked mode (SCM) and supplies approximately
8 MHz on ICGOUT which corresponds to a 4 MHz bus frequency (f_Bus).
MC9S08GB/GT Data Sheet, Rev. 2.3
114
Freescale Semiconductor