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MC9S08GB60 Datasheet, PDF (30/290 Pages) Motorola, Inc – Microcontrollers | |||
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Chapter 2 Pins and Connections
NOTE
To avoid extra current drain from ï¬oating input pins, the reset initialization
routine in the application program should either enable on-chip pullup
devices or change the direction of unused pins to outputs so the pins do not
ï¬oat.
For information about controlling these pins as general-purpose I/O pins, see Chapter 6, âParallel
Input/Output.â For information about how and when on-chip peripheral systems use these pins, refer to the
appropriate section from Table 2-1.
Table 2-1. Pin Sharing References
Port Pins
Alternate
Function
Reference1
PTA7âPTA0
KBI1P7âKBI1P0
Chapter 2, âPins and Connectionsâ
PTB7âPTB0 AD1P7âAD1P0
Chapter 14, âAnalog-to-Digital Converter (ATD) Moduleâ
PTC7âPTC4
â
Chapter 6, âParallel Input/Outputâ
PTC3âPTC2 SCL1âSDA1
Chapter 13, âInter-Integrated Circuit (IIC) Moduleâ
PTC1âPTC0 RxD2âTxD2
Chapter 11, âSerial Communications Interface (SCI) Moduleâ
PTD7âPTD3
TPM2CH4â
TPM2CH0
Chapter 10, âTimer/PWM (TPM) Moduleâ
PTD2âPTD0
TPM1CH2â
TPM1CH0
Chapter 10, âTimer/PWM (TPM) Moduleâ
PTE7âPTE6
â
Chapter 6, âParallel Input/Outputâ
PTE5
PTE4
PTE3
PTE2
SPSCK1
MISO1
MOSI1
SS1
Chapter 12, âSerial Peripheral Interface (SPI) Moduleâ
PTE1âPTE0 RxD1âTxD1
Chapter 11, âSerial Communications Interface (SCI) Moduleâ
PTF7âPTF0
â
Chapter 6, âParallel Input/Outputâ
PTG7âPTG3
â
Chapter 6, âParallel Input/Outputâ
PTG2âPTG1 EXTALâXTAL
Chapter 7, âInternal Clock Generator (ICG) Moduleâ
PTG0
BKGD/MS
Chapter 15, âDevelopment Supportâ
1 See this section for information about modules that share these pins.
When an on-chip peripheral system is controlling a pin, data direction control bits still determine what is
read from port data registers even though the peripheral module controls the pin direction by controlling
the enable for the pinâs output buffer. See Chapter 6, âParallel Input/Outputâ for details.
Pullup enable bits for each input pin control whether on-chip pullup devices are enabled whenever the pin
is acting as an input even if it is being controlled by an on-chip peripheral module. When the PTA7âPTA4
pins are controlled by the KBI module and are conï¬gured for rising-edge/high-level sensitivity, the pullup
enable control bits enable pulldown devices rather than pullup devices. Similarly, when IRQ is conï¬gured
MC9S08GB/GT Data Sheet, Rev. 2.3
30
Freescale Semiconductor
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