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| MC9S08GB60 Datasheet, PDF (20/290 Pages) Motorola, Inc – Microcontrollers | |||
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Chapter 1 Introduction
HCS08 CORE
BDC
CPU
INTERNAL BUS
DEBUG
MODULE (DBG)
8
PTA7/KBI1P7â
PTA0/KBI1P0
NOTES 1, 7
RESET
NOTE 4
IRQ
NOTES 2, 3
HCS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
RTI
COP
IRQ
LVD
USER FLASH
(GT60 = 61,268 BYTES)
(GT32 = 32,768 BYTES)
(GT16 = 16,384 BYTES)
VDDAD
VSSAD
VREFH
VREFL
VDD
VSS
USER RAM
(GT60 = 4096 BYTES)
(GT32 = 2048 BYTES)
(GT16 = 1024 BYTES)
10-BIT
ANALOG-TO-DIGITAL
CONVERTER (ATD1)
INTERNAL CLOCK
GENERATOR (ICG)
LOW-POWER OSCILLATOR
VOLTAGE
REGULATOR
8-BIT KEYBOARD
INTERRUPT MODULE (KBI1)
IIC MODULE (IIC1)
SERIAL COMMUNICATIONS
INTERFACE MODULE (SCI1)
SERIAL COMMUNICATIONS
INTERFACE MODULE (SCI2)
3-CHANNEL TIMER/PWM
MODULE (TPM1)
(NOTE 8)
5-CHANNEL TIMER/PWM
MODULE (TPM2)
(NOTE 8)
SERIAL PERIPHERAL
INTERFACE MODULE (SPI1)
8
PTB7/AD1P7â
PTB0/AD1P0
NOTE 1
PTC6 (NOTE 6)
PTC5 (NOTE 6)
PTC4
PTC3/SCL1
PTC2/SDA1
PTC1/RxD2
PTC0/TxD2
NOTES 1, 5
PTD4/TPM2CH1
PTD3/TPM2CH0
PTD1/TPM1CH1
NOTE 1
PTD0/TPM1CH0
PTE5/SPSCK1
PTE4/MOSI1
PTE3/MISO1
PTE2/SS1
PTE1/RxD1
PTE0/TxD1
NOTE 1
PTG2/EXTAL
PTG1/XTAL
NOTE 1
PTG0/BKGD/MS
NOTES:
1. Port pins are software configurable with pullup device if input port.
2. Pin contains software configurable pullup/pulldown device if IRQ enabled (IRQPE = 1).
3. IRQ does not have a clamp diode to VDD. IRQ should not be driven above VDD.
4. Pin contains integrated pullup device.
5. High current drive
6. PTC[6:5] are not available on the 42-pin SDIP package.
7. Pins PTA[7:4] contain both pullup and pulldown devices. Pulldown available when KBI enabled (KBIPn = 1).
8. Only two timer channels per TPM are bonded out. All channels are available for use as software compare.
Figure 1-2. MC9S08GTxx Block Diagram
MC9S08GB/GT Data Sheet, Rev. 2.3
20
Freescale Semiconductor
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