MC68HC705JJ7 Datasheet, PDF (94/164 Pages) Freescale Semiconductor, Inc – Microcontrollers

Analog Subsystem
8.11 Port B Interaction with Analog Inputs
The analog subsystem is connected directly to the port B I/O pins without any intervening gates. It is,
therefore, possible to measure the voltages on port B pins set as inputs or to have the analog voltage
measurements corrupted by port B pins set as outputs.
8.12 Port B Pins as Inputs
All the port B pins will power up as inputs or return to inputs after a reset of the device since the bits in the
port B data direction register will be reset.
If any port B pins are to be used for analog voltage measurements, they should be left as inputs. In this
case, not only can the voltage on the pin be measured, but the logic state of the port B pins can be read
from location $0002.
8.13 Port B Pulldowns
All the port B pins have internal software programmable pulldown devices available dependent on the
state of the SWPDI bit in the mask option register (MOR).
If the pulldowns are enabled, they will create an approximate 100 µA load to any analog source connected
to the pin. In some cases, the analog source may be able to supply this current without causing any error
due to the analog source output impedance. Since this may not always be true, it is therefore best to
disable port B pulldowns on those pins used for analog input sources.
8.14 Noise Sensitivity
In addition to the normal effects of electrical noise on the analog input signal there can also be other
noise-related effects caused by the digital-to-analog interface. Since there is only one V_SS return for both
the digital and the analog subsystems on the device, currents in the digital section may affect the analog
ground reference within the device. This can add voltage offsets to measured inputs or cause
channel-to-channel crosstalk.
To reduce the impact of these effects, there should be no switching of heavy I/O currents to or from the
device while there is a critical analog conversion or voltage comparison in process. Limiting switched I/O
currents to 2–4 mA during these times is recommended.
A noise reduction benefit can be gained with 0.1-µF bypass capacitors from each analog input (PB4:1) to
the V_SS pin. Also, try to keep all the digital power supply or load currents from passing through any
conductors which are the return paths for an analog signal.
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
94
Freescale Semiconductor